2026-01-28 23:37:12 +01:00
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/*
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Crafter®.Graphics
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Copyright (C) 2026 Catcrafts®
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catcrafts.net
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This library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License version 3.0 as published by the Free Software Foundation;
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with this library; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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module;
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2026-05-18 02:07:48 +02:00
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#ifndef CRAFTER_GRAPHICS_WINDOW_DOM
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2026-03-02 23:53:13 +01:00
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#include "vulkan/vulkan.h"
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2026-05-18 02:07:48 +02:00
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#endif // !CRAFTER_GRAPHICS_WINDOW_DOM
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2026-01-28 23:37:12 +01:00
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export module Crafter.Graphics:ShaderVulkan;
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2026-05-18 02:07:48 +02:00
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#ifndef CRAFTER_GRAPHICS_WINDOW_DOM
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2026-01-28 23:37:12 +01:00
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import std;
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2026-03-09 20:10:19 +01:00
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import :Device;
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2026-01-28 23:37:12 +01:00
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import :Types;
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2026-06-03 01:59:54 +00:00
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// ─── BEGIN NVIDIA descriptor-heap AS-read workaround (issue #15 / #7) ─────
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// Remove this whole block (and its call below, Device::workaroundDescriptorHeapAS,
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// and the RTPass push-data) once NVIDIA ships a driver that fixes the
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// VK_EXT_descriptor_heap acceleration-structure read fault.
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//
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// On the affected driver, reading an `accelerationStructureEXT` out of the
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// descriptor heap aborts the device. The build, the heap descriptor write and
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// everything else are correct (proven in #7); only the in-shader heap AS read
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// is broken — buffers/images through the same heap work. Acceleration
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// structures can equally be addressed by their device address, and
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// OpConvertUToAccelerationStructureKHR (which reads no descriptor) sidesteps
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// the faulting path entirely.
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//
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// glslang has no GLSL spelling for that conversion, so we rewrite the compiled
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// SPIR-V at module-load time: every `OpLoad %accelStruct <heap-ptr>` becomes a
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// load of the TLAS device address from a synthesized push-constant block
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// followed by OpConvertUToAccelerationStructureKHR. RTPass pushes the active
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// frame's TLAS address into that push constant. Shaders that never touch an
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// acceleration structure (no OpTypeAccelerationStructureKHR) are left untouched.
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namespace WorkaroundNvidiaAS {
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// SPIR-V numeric opcodes / enums used below.
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enum : std::uint32_t {
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OpEntryPoint = 15, OpCapability = 17,
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OpTypeInt = 21, OpTypeStruct = 30, OpTypePointer = 32,
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OpConstant = 43, OpVariable = 59, OpLoad = 61, OpAccessChain = 65,
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OpDecorate = 71, OpMemberDecorate = 72,
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OpConvertUToAccelerationStructureKHR = 4447,
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OpTypeAccelerationStructureKHR = 5341,
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CapabilityInt64 = 11,
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StorageClassPushConstant = 9,
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DecorationBlock = 2, DecorationOffset = 35,
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};
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inline bool IsAnnotation(std::uint32_t op) {
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// OpDecorate/OpMemberDecorate/OpDecorationGroup/OpGroupDecorate/
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// OpGroupMemberDecorate/OpDecorateId/OpDecorate(Member)String.
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return op == 71 || op == 72 || op == 73 || op == 74 || op == 75
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|| op == 332 || op == 5632 || op == 5633;
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}
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using Instr = std::vector<std::uint32_t>;
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inline void Patch(std::vector<std::uint32_t>& words) {
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if (words.size() < 5) return; // not a SPIR-V module we understand.
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// Split header (5 words) from the instruction stream.
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std::uint32_t bound = words[3];
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std::vector<Instr> instrs;
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for (std::size_t i = 5; i < words.size();) {
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std::uint32_t len = words[i] >> 16;
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if (len == 0 || i + len > words.size()) return; // malformed — bail.
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instrs.emplace_back(words.begin() + i, words.begin() + i + len);
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i += len;
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}
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// ── Scan for the AS type, reusable int/long types+constants, and the
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// section boundaries we need to insert into.
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std::uint32_t asTypeId = 0, ulongTypeId = 0, uintTypeId = 0, uintZeroId = 0;
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std::size_t lastCapIdx = 0, lastAnnotIdx = 0, firstFuncIdx = instrs.size();
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std::size_t entryIdx = instrs.size();
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for (std::size_t k = 0; k < instrs.size(); ++k) {
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std::uint32_t op = instrs[k][0] & 0xFFFFu;
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switch (op) {
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case OpTypeAccelerationStructureKHR: asTypeId = instrs[k][1]; break;
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case OpTypeInt:
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if (instrs[k][2] == 64 && instrs[k][3] == 0) ulongTypeId = instrs[k][1];
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else if (instrs[k][2] == 32 && instrs[k][3] == 0) uintTypeId = instrs[k][1];
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break;
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case OpConstant:
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if (uintTypeId && instrs[k][1] == uintTypeId && instrs[k][3] == 0)
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uintZeroId = instrs[k][2];
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break;
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case OpCapability: lastCapIdx = k; break;
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case OpEntryPoint: if (entryIdx == instrs.size()) entryIdx = k; break;
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default: break;
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}
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if (IsAnnotation(op)) lastAnnotIdx = k;
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if (op == 54 /*OpFunction*/ && firstFuncIdx == instrs.size()) firstFuncIdx = k;
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}
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if (asTypeId == 0) return; // shader never reads an acceleration structure.
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auto newId = [&] { return bound++; };
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auto mk = [](std::initializer_list<std::uint32_t> ops) {
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Instr in(ops);
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in[0] = static_cast<std::uint32_t>(in.size() << 16) | (in[0] & 0xFFFFu);
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return in;
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};
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// ── Synthesize the types/constants/push-constant we need, reusing any
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// the module already defines (SPIR-V forbids duplicate type defs).
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std::vector<Instr> typeDefs;
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if (uintTypeId == 0) {
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uintTypeId = newId();
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typeDefs.push_back(mk({OpTypeInt, uintTypeId, 32, 0}));
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}
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if (uintZeroId == 0) {
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uintZeroId = newId();
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typeDefs.push_back(mk({OpConstant, uintTypeId, uintZeroId, 0}));
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}
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if (ulongTypeId == 0) {
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ulongTypeId = newId();
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typeDefs.push_back(mk({OpTypeInt, ulongTypeId, 64, 0}));
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}
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std::uint32_t pcStructId = newId();
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std::uint32_t ptrPushStructId = newId();
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std::uint32_t ptrPushUlongId = newId();
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std::uint32_t pcVarId = newId();
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typeDefs.push_back(mk({OpTypeStruct, pcStructId, ulongTypeId}));
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typeDefs.push_back(mk({OpTypePointer, ptrPushStructId, StorageClassPushConstant, pcStructId}));
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typeDefs.push_back(mk({OpTypePointer, ptrPushUlongId, StorageClassPushConstant, ulongTypeId}));
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typeDefs.push_back(mk({OpVariable, ptrPushStructId, pcVarId, StorageClassPushConstant}));
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std::vector<Instr> decorations = {
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mk({OpMemberDecorate, pcStructId, 0, DecorationOffset, 0}),
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mk({OpDecorate, pcStructId, DecorationBlock}),
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};
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// ── Rewrite each `OpLoad %asType <ptr>` into address-load + convert.
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std::vector<Instr> rebuilt;
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rebuilt.reserve(instrs.size() + 8);
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for (const Instr& in : instrs) {
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std::uint32_t op = in[0] & 0xFFFFu;
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if (op == OpLoad && in[1] == asTypeId) {
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std::uint32_t resultId = in[2];
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std::uint32_t chainId = newId();
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std::uint32_t addrId = newId();
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rebuilt.push_back(mk({OpAccessChain, ptrPushUlongId, chainId, pcVarId, uintZeroId}));
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rebuilt.push_back(mk({OpLoad, ulongTypeId, addrId, chainId}));
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rebuilt.push_back(mk({OpConvertUToAccelerationStructureKHR, asTypeId, resultId, addrId}));
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} else {
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rebuilt.push_back(in);
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}
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}
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instrs.swap(rebuilt);
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// Recompute structural anchors (the rewrite above shifted indices).
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lastCapIdx = 0; lastAnnotIdx = 0; firstFuncIdx = instrs.size(); entryIdx = instrs.size();
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for (std::size_t k = 0; k < instrs.size(); ++k) {
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std::uint32_t op = instrs[k][0] & 0xFFFFu;
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if (op == OpCapability) lastCapIdx = k;
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if (op == OpEntryPoint && entryIdx == instrs.size()) entryIdx = k;
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if (IsAnnotation(op)) lastAnnotIdx = k;
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if (op == 54 && firstFuncIdx == instrs.size()) firstFuncIdx = k;
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}
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// Append the push-constant variable to the entry point's interface
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// list (required for SPIR-V ≥ 1.4 — both raygen modules are 1.4).
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if (entryIdx != instrs.size() && words[1] >= 0x00010400u) {
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instrs[entryIdx].push_back(pcVarId);
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instrs[entryIdx][0] = static_cast<std::uint32_t>(instrs[entryIdx].size() << 16)
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| OpEntryPoint;
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}
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// Insert highest-index-first so earlier anchors stay valid.
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instrs.insert(instrs.begin() + firstFuncIdx, typeDefs.begin(), typeDefs.end());
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instrs.insert(instrs.begin() + lastAnnotIdx + 1, decorations.begin(), decorations.end());
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instrs.insert(instrs.begin() + lastCapIdx + 1, mk({OpCapability, CapabilityInt64}));
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// ── Reassemble: header (with updated bound) + instruction stream.
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std::vector<std::uint32_t> out(words.begin(), words.begin() + 5);
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out[3] = bound;
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for (const Instr& in : instrs) out.insert(out.end(), in.begin(), in.end());
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words.swap(out);
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}
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}
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// ─── END NVIDIA descriptor-heap AS-read workaround ────────────────────────
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2026-01-28 23:37:12 +01:00
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export namespace Crafter {
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2026-02-22 00:46:38 +01:00
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class VulkanShader {
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public:
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2026-04-05 22:53:59 +02:00
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std::vector<VkSpecializationMapEntry> specilizations;
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VkSpecializationInfo* specilizationInfo;
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2026-02-22 00:46:38 +01:00
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VkShaderStageFlagBits stage;
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std::string entrypoint;
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VkShaderModule shader;
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2026-04-05 22:53:59 +02:00
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VulkanShader(const std::filesystem::path& path, std::string entrypoint, VkShaderStageFlagBits stage, VkSpecializationInfo* specilizationInfo) : stage(stage), entrypoint(entrypoint), specilizationInfo(specilizationInfo) {
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2026-02-22 00:46:38 +01:00
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std::ifstream file(path, std::ios::binary);
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if (!file) {
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std::cerr << "Error: Could not open file " << path << std::endl;
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}
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// Move to the end of the file to determine its size
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file.seekg(0, std::ios::end);
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std::streamsize size = file.tellg();
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file.seekg(0, std::ios::beg);
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std::vector<std::uint32_t> spirv(size / sizeof(std::uint32_t));
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// Read the data into the vector
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if (!file.read(reinterpret_cast<char*>(spirv.data()), size)) {
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std::cerr << "Error: Could not read data from file" << std::endl;
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}
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file.close();
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2026-06-03 01:59:54 +00:00
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// NVIDIA descriptor-heap AS-read workaround (issue #15 / #7).
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// No-op on every other driver and on shaders that don't read an
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// acceleration structure. Remove with the rest of the workaround
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// once a fixed NVIDIA driver ships.
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if (Device::workaroundDescriptorHeapAS) {
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WorkaroundNvidiaAS::Patch(spirv);
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}
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2026-02-22 00:46:38 +01:00
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VkShaderModuleCreateInfo module_info{VK_STRUCTURE_TYPE_SHADER_MODULE_CREATE_INFO};
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module_info.codeSize = spirv.size() * sizeof(uint32_t);
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module_info.pCode = spirv.data();
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2026-03-09 20:10:19 +01:00
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Device::CheckVkResult(vkCreateShaderModule(Device::device, &module_info, nullptr, &shader));
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2026-02-22 00:46:38 +01:00
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}
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};
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2026-05-18 02:07:48 +02:00
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}
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#endif // !CRAFTER_GRAPHICS_WINDOW_DOM
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