Merge pull request 'perf(tlas): dirty-track the per-frame TLAS instance+metadata upload (#118)' (#140) from claude/issue-118 into master
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commit
2783e47674
5 changed files with 437 additions and 12 deletions
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@ -484,6 +484,39 @@ namespace Crafter {
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);
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}
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// Ranged variant of FlushDevice(cmd, ...): flushes only the host writes
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// in [offset, offset+bytes) (rounded outward to nonCoherentAtomSize, and
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// a no-op on coherent memory — same gate as the other FlushDevice
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// overloads) and records the HOST->(dstStageMask, dstAccessMask) barrier.
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// Use after writing a sub-range so the cache-flush cost scales with the
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// bytes touched rather than the whole high-water capacity. The barrier
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// itself still spans the whole buffer (VK_WHOLE_SIZE): the execution/
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// visibility dependency is cheap regardless of range, and only the
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// flush's cache maintenance is bandwidth-sensitive.
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void FlushDevice(VkCommandBuffer cmd, VkAccessFlags dstAccessMask, VkPipelineStageFlags dstStageMask, VkDeviceSize offset, VkDeviceSize bytes) requires(Mapped) {
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FlushDevice(offset, bytes);
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VkBufferMemoryBarrier barrier = {
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.sType = VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER,
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.srcAccessMask = VK_ACCESS_HOST_WRITE_BIT,
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.dstAccessMask = dstAccessMask,
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.srcQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
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.dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
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.buffer = buffer,
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.offset = 0,
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.size = VK_WHOLE_SIZE
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};
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vkCmdPipelineBarrier(
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cmd,
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VK_PIPELINE_STAGE_HOST_BIT,
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dstStageMask,
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0,
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0, NULL,
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1, &barrier,
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0, NULL
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);
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}
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void FlushHost() requires(Mapped) {
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// Coherent memory needs no explicit invalidate — device writes are
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// automatically visible to the host.
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