ARM NEON
NEON backend for VectorF32 on AArch64: one float32x4_t per vector (Len * Packing <= 4), with a vectorised sin/cos port of the SSE helpers. VectorF16 gets a native float16x8_t path when the target has ARMv8.2-FP16 arithmetic. Without it VectorF16 aliases VectorF32, which converts fp16 <-> fp32 on Load/Store. The scalar fallback gains the batched Dot that MatrixRowMajor relies on. Test tiers added for armv8-a and armv8.2-a+fp16. Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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6 changed files with 825 additions and 17 deletions
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@ -11,6 +11,9 @@ module;
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#ifdef __riscv_vector
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#include <riscv_vector.h>
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#endif
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#if defined(__aarch64__) && defined(__ARM_NEON)
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#include <arm_neon.h>
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#endif
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export module Crafter.Math:VectorF32;
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import std;
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import :Common;
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@ -1931,10 +1934,318 @@ namespace Crafter {
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return r;
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}
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};
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#elif defined(__aarch64__) && defined(__ARM_NEON)
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// AArch64 NEON implementation. VectorType is always a float32x4_t: NEON
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// registers are 128 bits wide, so Common.cppm caps Len*Packing at 4
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// floats, as on WASM. Shuffles and blends have compile-time lane maps and
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// go through __builtin_shufflevector, which lets the compiler pick the
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// cheapest of dup/ext/rev/zip/uzp/ins/tbl per map instead of always
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// paying for a tbl and its index load.
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export template <std::uint8_t Len, std::uint8_t Packing>
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struct VectorF32 : public VectorBase<Len, Packing, float> {
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template <std::uint8_t Len2, std::uint8_t Packing2>
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friend struct VectorF32;
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using Base = VectorBase<Len, Packing, float>;
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static constexpr std::uint8_t NElems = Base::AlignmentElement;
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static_assert(NElems == 4, "NEON VectorF32 assumes 4-lane vectors");
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private:
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// Source lane for each of the four output lanes: 0..3 pick from the
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// first operand of Permute, 4..7 from the second. Every map names a
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// real source lane for all four outputs, padding included, so no lane
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// of a result is ever undefined.
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using LaneMap = std::array<int, 4>;
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template <LaneMap Lanes>
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static constexpr float32x4_t Permute(float32x4_t a, float32x4_t b) {
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return __builtin_shufflevector(a, b, Lanes[0], Lanes[1], Lanes[2], Lanes[3]);
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}
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// Per-pack shuffle; padding lanes stay where they are.
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template <std::array<std::uint8_t, Len> ShuffleValues>
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static consteval LaneMap GetShuffleLanes() {
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LaneMap lanes{0, 1, 2, 3};
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for (std::uint8_t p = 0; p < Packing; ++p)
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for (std::uint8_t i = 0; i < Len; ++i)
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lanes[p * Len + i] = p * Len + ShuffleValues[i];
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return lanes;
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}
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// Per-pack blend: the second operand where the mask is set, the first
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// elsewhere.
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template <std::array<bool, Len> BlendValues>
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static consteval LaneMap GetBlendLanes() {
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LaneMap lanes{0, 1, 2, 3};
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for (std::uint8_t p = 0; p < Packing; ++p)
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for (std::uint8_t i = 0; i < Len; ++i)
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if (BlendValues[i]) lanes[p * Len + i] += 4;
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return lanes;
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}
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// Moves every sub-vector to its slot in a (ToLen, ToPacking) layout,
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// carrying over the components both layouts have. The remaining lanes
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// are left as they were.
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template <std::uint8_t ToLen, std::uint8_t ToPacking>
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static consteval LaneMap GetResizeLanes() {
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LaneMap lanes{0, 1, 2, 3};
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for (std::uint8_t p = 0; p < std::min(Packing, ToPacking); ++p)
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for (std::uint8_t i = 0; i < std::min(Len, ToLen); ++i)
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lanes[p * ToLen + i] = p * Len + i;
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return lanes;
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}
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// Normalize keeps one scale per sub-vector in a VectorF32<1, N*Packing>;
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// this spreads the scales of input `Index` over the Len lanes of each
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// of its sub-vectors. Padding lanes repeat the last scale, so the map
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// is a plain dup wherever it can be.
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template <std::uint8_t Index>
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static consteval LaneMap GetSpreadLanes() {
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LaneMap lanes{};
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for (std::uint8_t i = 0; i < 4; ++i)
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lanes[i] = Index * Packing + std::min(i / Len, Packing - 1);
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return lanes;
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}
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// Collapses every sub-vector of the BatchSize registers into the sum
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// of its components: result lane i*Packing+p is the sum of lanes
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// [p*Len, p*Len+Len) of m[i]. faddp adds the adjacent lane pairs of
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// two registers in one go, so two levels of it reduce four 4-lane
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// registers to four sums without a transpose.
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static constexpr float32x4_t SumPacks(std::array<float32x4_t, Base::BatchSize> m) {
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if constexpr (Packing == 1 && Len >= 3) {
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if constexpr (Len == 3) {
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// Lane 3 is padding and must not reach the sum.
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for (float32x4_t& product : m) product = vsetq_lane_f32(0.0f, product, 3);
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}
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return vpaddq_f32(vpaddq_f32(m[0], m[1]), vpaddq_f32(m[2], m[3]));
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} else if constexpr (Packing == 1 && Len == 2) {
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return vpaddq_f32(
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vcombine_f32(vget_low_f32(m[0]), vget_low_f32(m[1])),
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vcombine_f32(vget_low_f32(m[2]), vget_low_f32(m[3])));
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} else if constexpr (Packing == 1) {
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return vcombine_f32(
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vget_low_f32(vzip1q_f32(m[0], m[1])),
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vget_low_f32(vzip1q_f32(m[2], m[3])));
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} else if constexpr (Packing == 2 && Len == 2) {
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return vpaddq_f32(m[0], m[1]);
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} else if constexpr (Packing == 2) {
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return vcombine_f32(vget_low_f32(m[0]), vget_low_f32(m[1]));
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} else {
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// Len == 1 with a lone input: its lanes already are the sums.
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return m[0];
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}
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}
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public:
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constexpr VectorF32() = default;
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constexpr VectorF32(float32x4_t vv) { this->v = vv; }
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constexpr VectorF32(const float* vB) { Load(vB); }
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constexpr VectorF32(const _Float16* vB) { Load(vB); }
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constexpr VectorF32(float val) { this->v = vdupq_n_f32(val); }
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constexpr void Load(const float* vB) { this->v = vld1q_f32(vB); }
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constexpr void Store(float* vB) const { vst1q_f32(vB, this->v); }
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// fp16 <-> fp32 conversion (fcvtl / fcvtn) is part of the AArch64
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// baseline. The halves move through memcpy because arm_neon.h types
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// its fp16 pointers as __fp16, which _Float16 may not alias.
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constexpr void Load(const _Float16* vB) {
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float16x4_t half;
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std::memcpy(&half, vB, sizeof(half));
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this->v = vcvt_f32_f16(half);
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}
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constexpr void Store(_Float16* vB) const {
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float16x4_t half = vcvt_f16_f32(this->v);
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std::memcpy(vB, &half, sizeof(half));
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}
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template<typename T>
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constexpr std::array<T, NElems> Store() const {
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std::array<T, NElems> r;
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Store(r.data());
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return r;
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}
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template <std::uint8_t BLen, std::uint8_t BPacking>
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constexpr operator VectorF32<BLen, BPacking>() const {
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return VectorF32<BLen, BPacking>(Permute<GetResizeLanes<BLen, BPacking>()>(this->v, this->v));
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}
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constexpr VectorF32<Len, Packing> operator+(VectorF32<Len, Packing> b) const { return VectorF32<Len, Packing>(vaddq_f32(this->v, b.v)); }
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constexpr VectorF32<Len, Packing> operator-(VectorF32<Len, Packing> b) const { return VectorF32<Len, Packing>(vsubq_f32(this->v, b.v)); }
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constexpr VectorF32<Len, Packing> operator*(VectorF32<Len, Packing> b) const { return VectorF32<Len, Packing>(vmulq_f32(this->v, b.v)); }
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constexpr VectorF32<Len, Packing> operator/(VectorF32<Len, Packing> b) const { return VectorF32<Len, Packing>(vdivq_f32(this->v, b.v)); }
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constexpr void operator+=(VectorF32<Len, Packing> b) { this->v = vaddq_f32(this->v, b.v); }
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constexpr void operator-=(VectorF32<Len, Packing> b) { this->v = vsubq_f32(this->v, b.v); }
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constexpr void operator*=(VectorF32<Len, Packing> b) { this->v = vmulq_f32(this->v, b.v); }
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constexpr void operator/=(VectorF32<Len, Packing> b) { this->v = vdivq_f32(this->v, b.v); }
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constexpr VectorF32<Len, Packing> operator+(float b) const { return *this + VectorF32<Len, Packing>(b); }
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constexpr VectorF32<Len, Packing> operator-(float b) const { return *this - VectorF32<Len, Packing>(b); }
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constexpr VectorF32<Len, Packing> operator*(float b) const { return *this * VectorF32<Len, Packing>(b); }
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constexpr VectorF32<Len, Packing> operator/(float b) const { return *this / VectorF32<Len, Packing>(b); }
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constexpr void operator+=(float b) { *this += VectorF32<Len, Packing>(b); }
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constexpr void operator-=(float b) { *this -= VectorF32<Len, Packing>(b); }
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constexpr void operator*=(float b) { *this *= VectorF32<Len, Packing>(b); }
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constexpr void operator/=(float b) { *this /= VectorF32<Len, Packing>(b); }
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constexpr VectorF32<Len, Packing> operator-() const { return VectorF32<Len, Packing>(vnegq_f32(this->v)); }
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// Only the Len*Packing lanes in use take part; padding lanes can hold
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// anything.
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constexpr bool operator==(VectorF32<Len, Packing> b) const {
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uint32x4_t equal = vceqq_f32(this->v, b.v);
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if constexpr (Len * Packing == 4) {
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return vminvq_u32(equal) == ~0u;
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} else if constexpr (Len * Packing == 3) {
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return vminvq_u32(vcopyq_laneq_u32(equal, 3, equal, 0)) == ~0u;
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} else if constexpr (Len * Packing == 2) {
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return vgetq_lane_u64(vreinterpretq_u64_u32(equal), 0) == ~0ull;
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} else {
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return vgetq_lane_u32(equal, 0) == ~0u;
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}
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}
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constexpr bool operator!=(VectorF32<Len, Packing> b) const { return !(*this == b); }
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template<std::uint32_t ExtractLen>
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constexpr VectorF32<ExtractLen, Packing> ExtractLo() const {
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return VectorF32<ExtractLen, Packing>(Permute<GetResizeLanes<ExtractLen, Packing>()>(this->v, this->v));
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}
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constexpr VectorF32<Len, Packing> Cos() const {
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return VectorF32<Len, Packing>(Base::cos_f32x4(this->v));
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}
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constexpr VectorF32<Len, Packing> Sin() const {
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return VectorF32<Len, Packing>(Base::sin_f32x4(this->v));
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}
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constexpr std::tuple<VectorF32<Len, Packing>, VectorF32<Len, Packing>> SinCos() const {
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float32x4_t s, c;
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Base::sincos_f32x4(this->v, s, c);
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return { VectorF32<Len, Packing>(s), VectorF32<Len, Packing>(c) };
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}
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template <std::array<bool, Len> values>
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constexpr VectorF32<Len, Packing> Negate() const {
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constexpr std::array<float, NElems> mask = Base::template GetNegateMask<values>();
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return VectorF32<Len, Packing>(vreinterpretq_f32_u32(veorq_u32(vreinterpretq_u32_f32(this->v), vreinterpretq_u32_f32(vld1q_f32(mask.data())))));
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}
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// vfmaq_f32(a, b, c) is a + b*c.
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static constexpr VectorF32<Len, Packing> MulitplyAdd(VectorF32<Len, Packing> a, VectorF32<Len, Packing> b, VectorF32<Len, Packing> add) {
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return VectorF32<Len, Packing>(vfmaq_f32(add.v, a.v, b.v));
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}
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static constexpr VectorF32<Len, Packing> MulitplySub(VectorF32<Len, Packing> a, VectorF32<Len, Packing> b, VectorF32<Len, Packing> sub) {
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return VectorF32<Len, Packing>(vfmaq_f32(vnegq_f32(sub.v), a.v, b.v));
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}
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// a × b = (a * b.yzx - b * a.yzx).yzx, one shuffle less than building
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// both yzx and zxy of each input. The rotations let the padding lane
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// repeat y, which is two ext instructions; keeping that lane in place,
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// as Shuffle does, takes three. vfmsq_f32(a, b, c) is a - b*c.
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constexpr static VectorF32<Len, Packing> Cross(VectorF32<Len, Packing> a, VectorF32<Len, Packing> b) requires(Len == 3) {
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constexpr LaneMap yzx{1, 2, 0, 1};
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float32x4_t aYzx = Permute<yzx>(a.v, a.v);
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float32x4_t bYzx = Permute<yzx>(b.v, b.v);
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float32x4_t zxy = vfmsq_f32(vmulq_f32(a.v, bYzx), b.v, aYzx);
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return VectorF32<Len, Packing>(Permute<yzx>(zxy, zxy));
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}
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template <const std::array<std::uint8_t, Len> ShuffleValues>
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constexpr VectorF32<Len, Packing> Shuffle() const {
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return VectorF32<Len, Packing>(Permute<GetShuffleLanes<ShuffleValues>()>(this->v, this->v));
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}
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template <std::array<bool, Len> ShuffleValues>
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constexpr static VectorF32<Len, Packing> Blend(VectorF32<Len, Packing> a, VectorF32<Len, Packing> b) {
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return VectorF32<Len, Packing>(Permute<GetBlendLanes<ShuffleValues>()>(a.v, b.v));
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}
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template<typename... Rest>
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requires((std::is_same_v<Rest, VectorF32<Len, Packing>> && ...) &&
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(1 + sizeof...(Rest) == VectorBase<Len, Packing, float>::BatchSize))
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constexpr static auto LengthSq(VectorF32<Len, Packing> first, Rest... rest) {
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constexpr std::uint8_t N = VectorBase<Len, Packing, float>::BatchSize;
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std::array<VectorF32<Len, Packing>, N> args{ first, rest... };
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std::array<float32x4_t, N> squares;
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for (std::uint8_t i = 0; i < N; ++i) squares[i] = vmulq_f32(args[i].v, args[i].v);
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return VectorF32<1, static_cast<std::uint8_t>(Packing * N)>(SumPacks(squares));
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}
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template<typename... Rest>
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requires((std::is_same_v<Rest, VectorF32<Len, Packing>> && ...) &&
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(1 + sizeof...(Rest) == VectorBase<Len, Packing, float>::BatchSize))
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constexpr static auto Length(VectorF32<Len, Packing> first, Rest... rest) {
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auto sq = LengthSq(first, rest...);
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sq.v = vsqrtq_f32(sq.v);
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return sq;
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}
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// Pairwise dot products across BatchSize pairs: Dot(a0, b0, a1, b1,
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// ...) returns one lane per sub-vector pair.
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template<typename... Rest>
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requires((std::is_same_v<Rest, VectorF32<Len, Packing>> && ...) &&
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(1 + sizeof...(Rest) == 2 * VectorBase<Len, Packing, float>::BatchSize))
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constexpr static auto Dot(VectorF32<Len, Packing> first, Rest... rest) {
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constexpr std::uint8_t N = VectorBase<Len, Packing, float>::BatchSize;
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std::array<VectorF32<Len, Packing>, 2 * N> args{ first, rest... };
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std::array<float32x4_t, N> products;
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for (std::uint8_t i = 0; i < N; ++i) products[i] = vmulq_f32(args[2 * i].v, args[2 * i + 1].v);
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return VectorF32<1, static_cast<std::uint8_t>(Packing * N)>(SumPacks(products));
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}
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// One sqrt and one divide cover the whole batch; each input then
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// multiplies by its own lanes of the result.
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template<typename... Rest>
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requires((std::is_same_v<Rest, VectorF32<Len, Packing>> && ...) &&
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(1 + sizeof...(Rest) == VectorBase<Len, Packing, float>::BatchSize))
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constexpr static auto Normalize(VectorF32<Len, Packing> first, Rest... rest) {
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constexpr std::uint8_t N = VectorBase<Len, Packing, float>::BatchSize;
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std::array<VectorF32<Len, Packing>, N> args{ first, rest... };
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float32x4_t scale = vdivq_f32(vdupq_n_f32(1.0f), Length(first, rest...).v);
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return [&]<std::size_t... Is>(std::index_sequence<Is...>) {
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return std::array<VectorF32<Len, Packing>, N>{
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VectorF32<Len, Packing>(vmulq_f32(args[Is].v, Permute<GetSpreadLanes<Is>()>(scale, scale)))...
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};
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}(std::make_index_sequence<N>{});
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}
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constexpr static VectorF32<Len, Packing> Rotate(VectorF32<3, Packing> v, VectorF32<4, Packing> q) requires(Len == 3) {
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VectorF32<3, Packing> qv = q;
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VectorF32<3, Packing> qw = q.template Shuffle<{{3,3,3,3}}>();
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VectorF32<3, Packing> t = Cross(qv, v) * 2.0f;
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return MulitplyAdd(t, qw, v) + Cross(qv, t);
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}
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constexpr static VectorF32<3, Packing> RotatePivot(VectorF32<3, Packing> v, VectorF32<4, Packing> q, VectorF32<3, Packing> pivot) requires(Len == 3) {
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VectorF32<3, Packing> translated = v - pivot;
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return Rotate(translated, q) + pivot;
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}
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// With (roll, pitch, yaw) half angles in x, y, z:
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// x = sx*cy*cz - cx*sy*sz y = cx*sy*cz + sx*cy*sz
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// z = cx*cy*sz - sx*sy*cz w = cx*cy*cz + sx*sy*sz
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// Each factor row below is one two-source shuffle of the sin (lanes
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// 0..3) and cos (lanes 4..7) registers.
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constexpr static VectorF32<4, Packing> QuanternionFromEuler(VectorF32<3, Packing> EulerHalf) requires(Len == 4) {
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float32x4_t s, c;
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Base::sincos_f32x4(EulerHalf.v, s, c);
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float32x4_t left = vmulq_f32(
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vmulq_f32(
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Permute<LaneMap{0, 4, 4, 4}>(s, c), // sx cx cx cx
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Permute<LaneMap{5, 1, 5, 5}>(s, c)), // cy sy cy cy
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Permute<LaneMap{6, 6, 2, 6}>(s, c)); // cz cz sz cz
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float32x4_t right = vmulq_f32(
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Permute<LaneMap{4, 0, 0, 0}>(s, c), // cx sx sx sx
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Permute<LaneMap{1, 5, 1, 1}>(s, c)); // sy cy sy sy
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VectorF32<4, Packing> rightZ(Permute<LaneMap{2, 2, 6, 2}>(s, c)); // sz sz cz sz
|
||||
rightZ = rightZ.template Negate<{{true, false, true, false}}>();
|
||||
return VectorF32<4, Packing>(vfmaq_f32(left, right, rightZ.v));
|
||||
}
|
||||
};
|
||||
#else
|
||||
// Scalar software fallback for non-x86_64 targets. Future arches can swap
|
||||
// in their own intrinsic implementation by adding an arch-specific branch
|
||||
// above and gating this one out.
|
||||
// Scalar software fallback for targets without an intrinsic backend above.
|
||||
// Future arches can swap in their own intrinsic implementation by adding
|
||||
// an arch-specific branch above and gating this one out.
|
||||
export template <std::uint8_t Len, std::uint8_t Packing>
|
||||
struct VectorF32 : public VectorBase<Len, Packing, float> {
|
||||
template <std::uint8_t Len2, std::uint8_t Packing2>
|
||||
|
|
@ -2136,6 +2447,28 @@ namespace Crafter {
|
|||
return sq;
|
||||
}
|
||||
|
||||
// Batched dot product over BatchSize (a, b) pairs: Dot(a0, b0, a1, b1,
|
||||
// ...) returns one lane per pair. MatrixRowMajor relies on it, so
|
||||
// without it this fallback (every target that has no intrinsic
|
||||
// backend above) does not compile. Only the first Len lanes of each
|
||||
// input are summed, as in the other backends.
|
||||
template<typename... Rest>
|
||||
requires((std::is_same_v<Rest, VectorF32<Len, Packing>> && ...) &&
|
||||
(1 + sizeof...(Rest) == 2 * VectorBase<Len, Packing, float>::BatchSize))
|
||||
constexpr static auto Dot(VectorF32<Len, Packing> first, Rest... rest) {
|
||||
constexpr std::uint8_t N = VectorBase<Len, Packing, float>::BatchSize;
|
||||
VectorF32<1, static_cast<std::uint8_t>(Packing * N)> r;
|
||||
std::array<VectorF32<Len, Packing>, 2 * N> args{ first, rest... };
|
||||
for (std::uint8_t i = 0; i < N; ++i)
|
||||
for (std::uint8_t p = 0; p < Packing; ++p) {
|
||||
float acc = 0.0f;
|
||||
for (std::uint8_t k = 0; k < Len; ++k)
|
||||
acc += args[2 * i].v[p * Len + k] * args[2 * i + 1].v[p * Len + k];
|
||||
r.v[i * Packing + p] = acc;
|
||||
}
|
||||
return r;
|
||||
}
|
||||
|
||||
template<typename... Rest>
|
||||
requires((std::is_same_v<Rest, VectorF32<Len, Packing>> && ...) &&
|
||||
(1 + sizeof...(Rest) == VectorBase<Len, Packing, float>::BatchSize))
|
||||
|
|
|
|||
Loading…
Reference in a new issue