RVV
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f0becd1582
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35091b2c53
5 changed files with 322 additions and 12 deletions
23
project.cpp
23
project.cpp
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@ -28,12 +28,12 @@ extern "C" Configuration CrafterBuildProject(std::span<const std::string_view> a
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cfg.GetInterfacesAndImplementations(ifaces, impls);
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}
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auto addTest = [&](std::string_view testName, std::string march, std::string mtune) {
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auto addTest = [&](std::string_view testName, std::string march, std::string mtune, std::string target = {}) {
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Test t;
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t.config.path = "./";
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t.config.name = std::format("{}-{}", testName, march);
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t.config.outputName = t.config.name;
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t.config.target = cfg.target;
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t.config.target = target.empty() ? cfg.target : target;
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t.config.type = ConfigurationType::Executable;
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t.config.march = march;
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t.config.mtune = mtune;
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@ -44,10 +44,23 @@ extern "C" Configuration CrafterBuildProject(std::span<const std::string_view> a
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t.config.GetInterfacesAndImplementations(ifaces, impls);
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cfg.tests.push_back(std::move(t));
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};
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const std::string_view target = cfg.target;
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const bool isX86 = target.starts_with("x86_64") || target.starts_with("i686");
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const bool isRiscv = target.starts_with("riscv");
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for (std::string_view name : { "Vector", "Intersection", "Matrix" }) {
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addTest(name, "sapphirerapids", "native");
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addTest(name, "x86-64-v4", "generic");
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addTest(name, "x86-64-v3", "generic");
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if (isX86) {
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addTest(name, "sapphirerapids", "native");
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addTest(name, "x86-64-v4", "generic");
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addTest(name, "x86-64-v3", "generic");
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}
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if (isRiscv) {
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// RISC-V tiers, mirroring the x86 selector: register width is
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// picked from the guaranteed VLEN encoded in the march's Zvl*
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// suffix. rv64gcv → ZVL128B (matches the RVA23 baseline).
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addTest(name, "rv64gcv_zvl512b", "generic");
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addTest(name, "rv64gcv_zvl256b", "generic");
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addTest(name, "rv64gcv", "generic");
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}
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}
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return cfg;
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