RISC-V updates for v7.1-rc8

- Fix the implementation of the CFI branch landing pad control
   prctl()s to return -EINVAL if unknown control bits are set, rather
   than silently ignoring the request; and add a kselftest for this
   case
 
 - Fix unaligned access performance testing to happen earlier in boot,
   which fixes a performance regression in the lib/checksum code
 
 - Fix a binfmt_elf warning when dumping core (due to missing
   .core_note_name for CFI registers)
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Merge tag 'riscv-for-linux-7.1-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Paul Walmsley:

 - Fix the implementation of the CFI branch landing pad control prctl()s
   to return -EINVAL if unknown control bits are set, rather than
   silently ignoring the request; and add a kselftest for this case

 - Fix unaligned access performance testing to happen earlier in boot,
   which fixes a performance regression in the lib/checksum code

 - Fix a binfmt_elf warning when dumping core (due to missing
   .core_note_name for CFI registers)

* tag 'riscv-for-linux-7.1-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: cfi: reject unknown flags in PR_SET_CFI
  riscv: Fix fast_unaligned_access_speed_key not getting initialized
  riscv/ptrace: Use USER_REGSET_NOTE_TYPE for REGSET_CFI
This commit is contained in:
Linus Torvalds 2026-06-10 07:18:32 -07:00
commit 767622308a
5 changed files with 15 additions and 12 deletions

View file

@ -50,6 +50,7 @@ void set_indir_lp_status(struct task_struct *task, bool enable);
void set_indir_lp_lock(struct task_struct *task, bool lock);
#define PR_SHADOW_STACK_SUPPORTED_STATUS_MASK (PR_SHADOW_STACK_ENABLE)
#define PR_CFI_SUPPORTED_STATUS_MASK (PR_CFI_ENABLE | PR_CFI_DISABLE | PR_CFI_LOCK)
#else

View file

@ -413,7 +413,7 @@ static struct user_regset riscv_user_regset[] __ro_after_init = {
#endif
#ifdef CONFIG_RISCV_USER_CFI
[REGSET_CFI] = {
.core_note_type = NT_RISCV_USER_CFI,
USER_REGSET_NOTE_TYPE(RISCV_USER_CFI),
.align = sizeof(__u64),
.n = sizeof(struct user_cfi_state) / sizeof(__u64),
.size = sizeof(__u64),

View file

@ -235,17 +235,6 @@ static void set_unaligned_access_static_branches(void)
modify_unaligned_access_branches(&fast_and_online, num_online_cpus());
}
static int __init lock_and_set_unaligned_access_static_branch(void)
{
cpus_read_lock();
set_unaligned_access_static_branches();
cpus_read_unlock();
return 0;
}
arch_initcall_sync(lock_and_set_unaligned_access_static_branch);
static int riscv_online_cpu(unsigned int cpu)
{
int ret = cpu_online_unaligned_access_init(cpu);
@ -440,6 +429,10 @@ static int __init check_unaligned_access_all_cpus(void)
cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "riscv:online",
riscv_online_cpu_vec, NULL);
cpus_read_lock();
set_unaligned_access_static_branches();
cpus_read_unlock();
return 0;
}

View file

@ -467,6 +467,9 @@ int arch_prctl_set_branch_landing_pad_state(struct task_struct *t, unsigned long
if (!is_user_lpad_enabled())
return -EINVAL;
if (state & ~PR_CFI_SUPPORTED_STATUS_MASK)
return -EINVAL;
/* indirect branch tracking is locked and further can't be modified by user */
if (is_indir_lp_locked(t))
return -EINVAL;

View file

@ -141,6 +141,12 @@ int main(int argc, char *argv[])
ksft_print_msg("Starting risc-v tests\n");
/* Test unknown PR_CFI bits */
ret = my_syscall5(__NR_prctl, PR_SET_CFI, PR_CFI_BRANCH_LANDING_PADS,
PR_CFI_ENABLE | 0xffff0, 0, 0);
if (!ret)
ksft_exit_fail_msg("PR_SET_CFI accepted reserved branch landing pad bits\n");
/*
* Landing pad test. Not a lot of kernel changes to support landing
* pads for user mode except lighting up a bit in senvcfg via a prctl.