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- Revert removing support for unpublished NVL-S GuC (Daniele)

Browse source 
- Suspend fixes related to multi-queue (Niranjana)
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Merge tag 'drm-xe-fixes-2026-06-04' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-fixes

- Revert removing support for unpublished NVL-S GuC (Daniele)
- Suspend fixes related to multi-queue (Niranjana)

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patch.msgid.link/aiHPGiPrAyHgwBZl@intel.com
This commit is contained in:
Dave Airlie 2026-06-05 07:18:09 +10:00
commit 9317df76ca
4 changed files with 10 additions and 80 deletions
Download patch file Download diff file Expand all files Collapse all files

17
drivers/gpu/drm/xe/xe_exec_queue.h
View file

@ -162,21 +162,4 @@ int xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch);
struct xe_lrc *xe_exec_queue_lrc(struct xe_exec_queue *q);
struct xe_lrc *xe_exec_queue_get_lrc(struct xe_exec_queue *q, u16 idx);
/**
* xe_exec_queue_idle_skip_suspend() - Can exec queue skip suspend
* @q: The exec_queue
*
* If an exec queue is not parallel and is idle, the suspend steps can be
* skipped in the submission backend immediatley signaling the suspend fence.
* Parallel queues cannot skip this step due to limitations in the submission
* backend.
*
* Return: True if exec queue is idle and can skip suspend steps, False
* otherwise
*/
static inline bool xe_exec_queue_idle_skip_suspend(struct xe_exec_queue *q)
{
return !xe_exec_queue_is_parallel(q) && xe_exec_queue_is_idle(q);
}
#endif

62
drivers/gpu/drm/xe/xe_guc_submit.c
View file

@ -71,7 +71,6 @@ exec_queue_to_guc(struct xe_exec_queue *q)
#define EXEC_QUEUE_STATE_WEDGED (1 << 8)
#define EXEC_QUEUE_STATE_BANNED (1 << 9)
#define EXEC_QUEUE_STATE_PENDING_RESUME (1 << 10)
#define EXEC_QUEUE_STATE_IDLE_SKIP_SUSPEND (1 << 11)
static bool exec_queue_registered(struct xe_exec_queue *q)
{
@ -218,21 +217,6 @@ static void clear_exec_queue_pending_resume(struct xe_exec_queue *q)
atomic_and(~EXEC_QUEUE_STATE_PENDING_RESUME, &q->guc->state);
}
static bool exec_queue_idle_skip_suspend(struct xe_exec_queue *q)
{
return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_IDLE_SKIP_SUSPEND;
}
static void set_exec_queue_idle_skip_suspend(struct xe_exec_queue *q)
{
atomic_or(EXEC_QUEUE_STATE_IDLE_SKIP_SUSPEND, &q->guc->state);
}
static void clear_exec_queue_idle_skip_suspend(struct xe_exec_queue *q)
{
atomic_and(~EXEC_QUEUE_STATE_IDLE_SKIP_SUSPEND, &q->guc->state);
}
static bool exec_queue_killed_or_banned_or_wedged(struct xe_exec_queue *q)
{
return (atomic_read(&q->guc->state) &
@ -1153,7 +1137,7 @@ static void submit_exec_queue(struct xe_exec_queue *q, struct xe_sched_job *job)
if (!job->restore_replay || job->last_replay) {
if (xe_exec_queue_is_parallel(q))
wq_item_append(q);
else if (!exec_queue_idle_skip_suspend(q))
else
xe_lrc_set_ring_tail(lrc, lrc->ring.tail);
job->last_replay = false;
}
@ -1163,9 +1147,12 @@ static void submit_exec_queue(struct xe_exec_queue *q, struct xe_sched_job *job)
/*
* All queues in a multi-queue group will use the primary queue
* of the group to interface with GuC.
* of the group to interface with GuC. If primay is suspended,
* just return. Jobs will get scheduled once primary is resumed.
*/
q = xe_exec_queue_multi_queue_primary(q);
if (exec_queue_suspended(q))
return;
if (!exec_queue_enabled(q) && !exec_queue_suspended(q)) {
action[len++] = XE_GUC_ACTION_SCHED_CONTEXT_MODE_SET;
@ -1810,10 +1797,9 @@ static void __guc_exec_queue_process_msg_suspend(struct xe_sched_msg *msg)
{
struct xe_exec_queue *q = msg->private_data;
struct xe_guc *guc = exec_queue_to_guc(q);
bool idle_skip_suspend = xe_exec_queue_idle_skip_suspend(q);
if (!idle_skip_suspend && guc_exec_queue_allowed_to_change_state(q) &&
!exec_queue_suspended(q) && exec_queue_enabled(q)) {
if (guc_exec_queue_allowed_to_change_state(q) && !exec_queue_suspended(q) &&
exec_queue_enabled(q)) {
wait_event(guc->ct.wq, vf_recovery(guc) ||
((q->guc->resume_time != RESUME_PENDING ||
xe_guc_read_stopped(guc)) && !exec_queue_pending_disable(q)));
@ -1832,33 +1818,11 @@ static void __guc_exec_queue_process_msg_suspend(struct xe_sched_msg *msg)
disable_scheduling(q, false);
}
} else if (q->guc->suspend_pending) {
if (idle_skip_suspend)
set_exec_queue_idle_skip_suspend(q);
set_exec_queue_suspended(q);
suspend_fence_signal(q);
}
}
static void sched_context(struct xe_exec_queue *q)
{
struct xe_guc *guc = exec_queue_to_guc(q);
struct xe_lrc *lrc = q->lrc[0];
u32 action[] = {
XE_GUC_ACTION_SCHED_CONTEXT,
q->guc->id,
};
xe_gt_assert(guc_to_gt(guc), !xe_exec_queue_is_parallel(q));
xe_gt_assert(guc_to_gt(guc), !exec_queue_destroyed(q));
xe_gt_assert(guc_to_gt(guc), exec_queue_registered(q));
xe_gt_assert(guc_to_gt(guc), !exec_queue_pending_disable(q));
trace_xe_exec_queue_submit(q);
xe_lrc_set_ring_tail(lrc, lrc->ring.tail);
xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action), 0, 0);
}
static void __guc_exec_queue_process_msg_resume(struct xe_sched_msg *msg)
{
struct xe_exec_queue *q = msg->private_data;
@ -1866,22 +1830,12 @@ static void __guc_exec_queue_process_msg_resume(struct xe_sched_msg *msg)
if (guc_exec_queue_allowed_to_change_state(q)) {
clear_exec_queue_suspended(q);
if (!exec_queue_enabled(q)) {
if (exec_queue_idle_skip_suspend(q)) {
struct xe_lrc *lrc = q->lrc[0];
clear_exec_queue_idle_skip_suspend(q);
xe_lrc_set_ring_tail(lrc, lrc->ring.tail);
}
q->guc->resume_time = RESUME_PENDING;
set_exec_queue_pending_resume(q);
enable_scheduling(q);
} else if (exec_queue_idle_skip_suspend(q)) {
clear_exec_queue_idle_skip_suspend(q);
sched_context(q);
}
} else {
clear_exec_queue_suspended(q);
clear_exec_queue_idle_skip_suspend(q);
}
}
@ -2853,8 +2807,8 @@ static void handle_sched_done(struct xe_guc *guc, struct xe_exec_queue *q,
xe_gt_assert(guc_to_gt(guc), exec_queue_pending_disable(q));
if (q->guc->suspend_pending) {
suspend_fence_signal(q);
clear_exec_queue_pending_disable(q);
suspend_fence_signal(q);
} else {
if (exec_queue_banned(q)) {
smp_wmb();

10
drivers/gpu/drm/xe/xe_hw_engine_group.c
View file

@ -208,21 +208,15 @@ static int xe_hw_engine_group_suspend_faulting_lr_jobs(struct xe_hw_engine_group
lockdep_assert_held_write(&group->mode_sem);
list_for_each_entry(q, &group->exec_queue_list, hw_engine_group_link) {
bool idle_skip_suspend;
if (!xe_vm_in_fault_mode(q->vm))
continue;
idle_skip_suspend = xe_exec_queue_idle_skip_suspend(q);
if (!idle_skip_suspend && has_deps)
if (has_deps)
return -EAGAIN;
xe_gt_stats_incr(q->gt, XE_GT_STATS_ID_HW_ENGINE_GROUP_SUSPEND_LR_QUEUE_COUNT, 1);
if (idle_skip_suspend)
xe_gt_stats_incr(q->gt,
XE_GT_STATS_ID_HW_ENGINE_GROUP_SKIP_LR_QUEUE_COUNT, 1);
need_resume |= !idle_skip_suspend;
need_resume = true;
q->ops->suspend(q);
gt = q->gt;
}

1
drivers/gpu/drm/xe/xe_uc_fw.c
View file

@ -115,7 +115,6 @@ struct fw_blobs_by_type {
#define XE_GT_TYPE_ANY XE_GT_TYPE_UNINITIALIZED
#define XE_GUC_FIRMWARE_DEFS(fw_def, mmp_ver, major_ver) \
fw_def(NOVALAKE_S, GT_TYPE_ANY, mmp_ver(xe, guc, nvl, 70, 55, 4)) \
fw_def(PANTHERLAKE, GT_TYPE_ANY, major_ver(xe, guc, ptl, 70, 54, 0)) \
fw_def(BATTLEMAGE, GT_TYPE_ANY, major_ver(xe, guc, bmg, 70, 54, 0)) \
fw_def(LUNARLAKE, GT_TYPE_ANY, major_ver(xe, guc, lnl, 70, 53, 0)) \