Catcrafts/milos-linux
2
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

WIP arm64: dts: qcom: milos: Add sound macro and soundwire nodes

Browse source 
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>

Still too many FIXMEs
This commit is contained in:
Luca Weiss 2026-03-06 11:23:10 +01:00
commit 963804678f
1 changed files with 177 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

177
arch/arm64/boot/dts/qcom/milos.dtsi
View file

@ -1484,6 +1484,165 @@
};
};
lpass_rxmacro: codec@3200000 {
compatible = "qcom,milos-lpass-rx-macro", "qcom,sm8550-lpass-rx-macro";
reg = <0x0 0x03200000 0x0 0x1000>;
clocks = <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&lpass_vamacro>;
clock-names = "mclk",
"macro",
"dcodec",
"fsgen";
#clock-cells = <0>;
clock-output-names = "mclk";
#sound-dai-cells = <1>;
};
swr1: soundwire@3210000 {
compatible = "qcom,soundwire-v1.7.0";
reg = <0x0 0x03210000 0x0 0x10000>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&lpass_rxmacro>;
clock-names = "iface";
label = "RX";
pinctrl-0 = <&rx_swr_active>;
pinctrl-names = "default";
qcom,din-ports = <0>; // FIXME <1>
qcom,dout-ports = <5>; // FIXME <6>
qcom,ports-sinterval = /bits/ 16 <0x03 0x3f 0x1f 0x07 0x03>;
qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x09 0x01>;
qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00>;
qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff>;
qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff>;
qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff>;
qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff>;
qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0x01 0x03>;
qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>;
#address-cells = <2>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "disabled";
};
lpass_txmacro: codec@3220000 {
compatible = "qcom,milos-lpass-tx-macro", "qcom,sm8550-lpass-tx-macro"; // FIXME are we v11?
reg = <0x0 0x03220000 0x0 0x1000>;
clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&lpass_vamacro>;
clock-names = "mclk",
"macro",
"dcodec",
"fsgen";
#clock-cells = <0>;
clock-output-names = "mclk";
#sound-dai-cells = <1>;
};
lpass_wsamacro: codec@3240000 {
compatible = "qcom,milos-lpass-wsa-macro", "qcom,sm8550-lpass-wsa-macro";
reg = <0x0 0x03240000 0x0 0x1000>;
clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&lpass_vamacro>;
clock-names = "mclk",
"macro",
"dcodec",
"fsgen";
#clock-cells = <0>;
clock-output-names = "mclk";
#sound-dai-cells = <1>;
};
swr0: soundwire@3250000 {
compatible = "qcom,soundwire-v1.7.0";
reg = <0x0 0x03250000 0x0 0x10000>;
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&lpass_wsamacro>;
clock-names = "iface";
label = "WSA";
pinctrl-0 = <&wsa_swr_active>;
pinctrl-names = "default";
qcom,din-ports = <2>; // FIXME <3>
qcom,dout-ports = <6>;
qcom,ports-sinterval = /bits/ 16 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x0f 0x0f>;
qcom,ports-offset1 = /bits/ 8 <0x01 0x03 0x05 0x02 0x04 0x15 0x06 0x0d>;
qcom,ports-offset2 = /bits/ 8 <0xff 0x07 0x1f 0xff 0x07 0x1f 0xff 0xff>;
qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
qcom,ports-block-pack-mode = /bits/ 8 <0x00 0x01 0x01 0x00 0x01 0x01 0x01 0x01>;
qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
qcom,ports-lane-control = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
#address-cells = <2>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "disabled";
};
swr2: soundwire@33b0000 {
compatible = "qcom,soundwire-v1.7.0";
reg = <0x0 0x033b0000 0x0 0x10000>;
interrupts = <GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-names = "core",
"wakeup";
clocks = <&lpass_txmacro>;
clock-names = "iface";
label = "TX";
pinctrl-0 = <&tx_swr_active>;
pinctrl-names = "default";
qcom,din-ports = <4>;
qcom,dout-ports = <0>;
qcom,ports-sinterval-low = /bits/ 8 <0x01 0x01 0x03 0x03>; // FIXME?
qcom,ports-offset1 = /bits/ 8 <0x01 0x01 0x00 0x01>; // taken UC0
qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x00 0x00>;
qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff>;
qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff>;
qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff>;
qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0xff 0xff>;
qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff>;
qcom,ports-lane-control = /bits/ 8 <0x00 0x01 0x01 0x00>; // taken UC0
#address-cells = <2>;
#size-cells = <0>;
#sound-dai-cells = <1>;
status = "disabled";
};
lpass_vamacro: codec@33f0000 {
compatible = "qcom,milos-lpass-va-macro", "qcom,sm8550-lpass-va-macro";
reg = <0x0 0x033f0000 0x0 0x1000>;
clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
clock-names = "mclk",
"macro",
"dcodec";
#clock-cells = <0>;
clock-output-names = "fsgen";
#sound-dai-cells = <1>;
};
lpass_tlmm: pinctrl@3440000 {
compatible = "qcom,milos-lpass-lpi-pinctrl";
reg = <0x0 0x03440000 0x0 0x20000>,
@ -1533,6 +1692,24 @@
};
};
wsa_swr_active: wsa-swr-active-state {
clk-pins {
pins = "gpio10";
function = "wsa_swr_clk";
drive-strength = <2>;
slew-rate = <1>;
bias-disable;
};
data-pins {
pins = "gpio11";
function = "wsa_swr_data";
drive-strength = <2>;
slew-rate = <1>;
bias-bus-hold;
};
};
lpi_i2s2_active: lpi-i2s2-active-state {
clk-pins {
pins = "gpio10";