Merge branch 'sensors' into combined
QMC6308 magnetometer via bitbanged sensor i2c bus (gpio153/154). # Conflicts: # arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts
This commit is contained in:
commit
a4301a82eb
4 changed files with 639 additions and 0 deletions
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@ -27,6 +27,34 @@
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serial1 = &uart11;
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};
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/*
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* The sensor I2C bus sits on TLMM eGPIO pads that have no AP QUP
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* function; on the stock OS it is driven by an island QUP of the
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* Snapdragon Sensor Core (ADSP). From the AP the pads are only
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* usable as software GPIOs, so bit-bang the bus.
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* Devices on the bus: QMC6308 magnetometer @ 0x2c, SPL07
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* barometer @ 0x76, STK3BCx ALS/proximity @ 0x48.
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*/
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i2c-sensors {
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compatible = "i2c-gpio";
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sda-gpios = <&tlmm 153 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&tlmm 154 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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pinctrl-0 = <&sensor_i2c_default>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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magnetometer@2c {
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compatible = "qstcorp,qmc6308";
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reg = <0x2c>;
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vdd-supply = <&vreg_l10b>;
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mount-matrix = "0", "-1", "0",
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"1", "0", "0",
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"0", "0", "1";
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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@ -1189,6 +1217,14 @@
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bias-disable;
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};
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sensor_i2c_default: sensor-i2c-default-state {
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/* SDA, SCL; external pull-ups to vreg_l10b */
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pins = "gpio153", "gpio154";
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function = "gpio";
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drive-strength = <2>;
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bias-disable;
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};
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ts_active: ts-irq-active-state {
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pins = "gpio19";
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function = "gpio";
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@ -198,6 +198,17 @@ config INFINEON_TLV493D
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To compile this driver as a module, choose M here: the module
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will be called tlv493d.
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config QMC6308
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tristate "QST QMC6308 3-Axis Magnetic Sensor"
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depends on I2C
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select REGMAP_I2C
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help
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Say Y here to add support for the QST QMC6308 3-Axis
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Magnetic Sensor.
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To compile this driver as a module, choose M here: the
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module will be called qmc6308.
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config SENSORS_HMC5843
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tristate
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select IIO_BUFFER
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@ -26,6 +26,8 @@ obj-$(CONFIG_IIO_ST_MAGN_SPI_3AXIS) += st_magn_spi.o
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obj-$(CONFIG_INFINEON_TLV493D) += tlv493d.o
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obj-$(CONFIG_QMC6308) += qmc6308.o
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obj-$(CONFIG_SENSORS_HMC5843) += hmc5843_core.o
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obj-$(CONFIG_SENSORS_HMC5843_I2C) += hmc5843_i2c.o
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obj-$(CONFIG_SENSORS_HMC5843_SPI) += hmc5843_spi.o
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590
drivers/iio/magnetometer/qmc6308.c
Normal file
590
drivers/iio/magnetometer/qmc6308.c
Normal file
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@ -0,0 +1,590 @@
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// SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
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/*
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* Support for QST QMC6308 3-Axis Magnetic Sensor on I2C bus.
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*
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* Copyright (C) 2026 Jorijn van der Graaf <jorijnvdgraaf@catcrafts.net>
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*
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* Datasheet available at
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* <https://qstcorp.com/upload/pdf/202202/13-52-15%20QMC6308%20Datasheet%20Rev.%20F(1).pdf>
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*/
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#include <linux/array_size.h>
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#include <linux/bitfield.h>
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#include <linux/bits.h>
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#include <linux/cleanup.h>
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#include <linux/delay.h>
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#include <linux/dev_printk.h>
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#include <linux/err.h>
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#include <linux/i2c.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include <linux/time.h>
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#include <linux/types.h>
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#include <asm/byteorder.h>
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#include <linux/iio/iio.h>
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#define QMC6308_REG_ID 0x00
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#define QMC6308_REG_X_LSB 0x01
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#define QMC6308_REG_STATUS 0x09
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#define QMC6308_REG_CTRL1 0x0A
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#define QMC6308_REG_CTRL2 0x0B
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#define QMC6308_REG_CTRL3 0x0D
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#define QMC6308_REG_CTRL4 0x29
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#define QMC6308_CHIP_ID 0x80
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/* Control register 1 */
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#define QMC6308_MODE_MASK GENMASK(1, 0)
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#define QMC6308_ODR_MASK GENMASK(3, 2)
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#define QMC6308_OSR1_MASK GENMASK(5, 4)
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#define QMC6308_OSR2_MASK GENMASK(7, 6)
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#define QMC6308_MODE_SUSPEND 0x00
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#define QMC6308_MODE_NORMAL 0x01
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#define QMC6308_ODR_10HZ 0x00
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#define QMC6308_ODR_50HZ 0x01
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#define QMC6308_ODR_100HZ 0x02
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#define QMC6308_ODR_200HZ 0x03
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#define QMC6308_OSR1_8 0x00
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#define QMC6308_OSR1_4 0x01
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#define QMC6308_OSR1_2 0x02
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#define QMC6308_OSR1_1 0x03
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/* Control register 2 */
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#define QMC6308_SET_RESET_MASK GENMASK(1, 0)
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#define QMC6308_RNG_MASK GENMASK(3, 2)
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#define QMC6308_SELF_TEST BIT(6)
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#define QMC6308_SOFT_RST BIT(7)
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#define QMC6308_SET_RESET_ON 0x00
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#define QMC6308_RNG_30G 0x00
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#define QMC6308_RNG_12G 0x01
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#define QMC6308_RNG_8G 0x02
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#define QMC6308_RNG_2G 0x03
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/* Status register */
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#define QMC6308_STATUS_DRDY BIT(0)
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#define QMC6308_STATUS_OVFL BIT(1)
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/*
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* Power-on completion time (datasheet Table 7), also used as a
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* conservative bound after soft reset, for which the datasheet
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* gives no figure.
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*/
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#define QMC6308_POR_US 250
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#define QMC6308_AUTOSUSPEND_DELAY_MS 500
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struct qmc6308_data {
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struct regmap *regmap;
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/*
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* Protect data->range/odr/osr.
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* Protect poll and read during measurement (reading the status
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* register clears DRDY).
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*/
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struct mutex mutex;
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struct iio_mount_matrix orientation;
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u8 range;
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u8 odr;
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u8 osr;
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};
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enum qmc6308_axis {
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QMC6308_AXIS_X,
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QMC6308_AXIS_Y,
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QMC6308_AXIS_Z,
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};
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static const int qmc6308_odr_avail[] = {
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[QMC6308_ODR_10HZ] = 10,
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[QMC6308_ODR_50HZ] = 50,
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[QMC6308_ODR_100HZ] = 100,
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[QMC6308_ODR_200HZ] = 200,
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};
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static const int qmc6308_osr1_avail[] = {
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[QMC6308_OSR1_8] = 8,
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[QMC6308_OSR1_4] = 4,
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[QMC6308_OSR1_2] = 2,
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[QMC6308_OSR1_1] = 1,
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};
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/*
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* Sensitivity is 1000/2500/3750/15000 LSB/Gauss for the
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* +-30/12/8/2 Gauss ranges respectively.
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*/
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static const int qmc6308_scales[][2] = {
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[QMC6308_RNG_30G] = { 0, 1000000 },
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[QMC6308_RNG_12G] = { 0, 400000 },
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[QMC6308_RNG_8G] = { 0, 266667 },
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[QMC6308_RNG_2G] = { 0, 66667 },
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};
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static int qmc6308_set_mode(struct qmc6308_data *data, unsigned int mode)
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{
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return regmap_update_bits(data->regmap, QMC6308_REG_CTRL1,
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QMC6308_MODE_MASK,
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FIELD_PREP(QMC6308_MODE_MASK, mode));
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}
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static int qmc6308_take_measurement(struct iio_dev *indio_dev, int index,
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int *val)
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{
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struct qmc6308_data *data = iio_priv(indio_dev);
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struct regmap *map = data->regmap;
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struct device *dev = regmap_get_device(map);
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unsigned int status;
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__le16 buf[3];
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int ret;
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ret = pm_runtime_resume_and_get(dev);
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if (ret) {
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/* EACCES means a read raced runtime PM disable on suspend */
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if (ret != -EACCES)
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dev_err(dev, "Failed to power on (%d)\n", ret);
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return ret;
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}
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scoped_guard(mutex, &data->mutex) {
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/* 50ms headroom over the slowest ODR (10Hz) */
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ret = regmap_read_poll_timeout(map, QMC6308_REG_STATUS,
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status,
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(status & QMC6308_STATUS_DRDY),
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2 * USEC_PER_MSEC,
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150 * USEC_PER_MSEC);
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if (ret)
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goto out_rpm_put;
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ret = regmap_bulk_read(map, QMC6308_REG_X_LSB, buf,
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sizeof(buf));
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if (ret)
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goto out_rpm_put;
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if (status & QMC6308_STATUS_OVFL)
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ret = -ERANGE;
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}
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out_rpm_put:
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pm_runtime_put_autosuspend(dev);
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if (ret)
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return ret;
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*val = (s16)le16_to_cpu(buf[index]);
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return 0;
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}
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static int qmc6308_read_raw(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan,
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int *val, int *val2, long mask)
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{
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struct qmc6308_data *data = iio_priv(indio_dev);
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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ret = qmc6308_take_measurement(indio_dev, chan->address, val);
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if (ret)
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return ret;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE: {
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guard(mutex)(&data->mutex);
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*val = qmc6308_scales[data->range][0];
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*val2 = qmc6308_scales[data->range][1];
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return IIO_VAL_INT_PLUS_NANO;
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}
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case IIO_CHAN_INFO_SAMP_FREQ: {
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guard(mutex)(&data->mutex);
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*val = qmc6308_odr_avail[data->odr];
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return IIO_VAL_INT;
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}
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case IIO_CHAN_INFO_OVERSAMPLING_RATIO: {
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guard(mutex)(&data->mutex);
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*val = qmc6308_osr1_avail[data->osr];
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||||
|
||||
return IIO_VAL_INT;
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||||
}
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default:
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return -EINVAL;
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}
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||||
}
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|
||||
static int qmc6308_write_raw(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan,
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int val, int val2, long mask)
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||||
{
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||||
struct qmc6308_data *data = iio_priv(indio_dev);
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||||
unsigned int status;
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||||
unsigned int i;
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||||
int ret;
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||||
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||||
switch (mask) {
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||||
case IIO_CHAN_INFO_SCALE: {
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||||
if (val != 0)
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return -EINVAL;
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||||
|
||||
for (i = 0; i < ARRAY_SIZE(qmc6308_scales); i++) {
|
||||
if (val2 == qmc6308_scales[i][1])
|
||||
break;
|
||||
}
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||||
if (i == ARRAY_SIZE(qmc6308_scales))
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||||
return -EINVAL;
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||||
|
||||
guard(mutex)(&data->mutex);
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||||
|
||||
ret = regmap_update_bits(data->regmap, QMC6308_REG_CTRL2,
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||||
QMC6308_RNG_MASK,
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||||
FIELD_PREP(QMC6308_RNG_MASK, i));
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||||
if (ret)
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||||
return ret;
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||||
|
||||
data->range = i;
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||||
|
||||
/*
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||||
* The data registers still hold (and DRDY still
|
||||
* advertises) a sample converted at the previous range;
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||||
* discard it so that the next read returns data matching
|
||||
* the new scale.
|
||||
*/
|
||||
return regmap_read(data->regmap, QMC6308_REG_STATUS,
|
||||
&status);
|
||||
}
|
||||
case IIO_CHAN_INFO_SAMP_FREQ: {
|
||||
for (i = 0; i < ARRAY_SIZE(qmc6308_odr_avail); i++) {
|
||||
if (val == qmc6308_odr_avail[i])
|
||||
break;
|
||||
}
|
||||
if (i == ARRAY_SIZE(qmc6308_odr_avail))
|
||||
return -EINVAL;
|
||||
|
||||
guard(mutex)(&data->mutex);
|
||||
|
||||
ret = regmap_update_bits(data->regmap, QMC6308_REG_CTRL1,
|
||||
QMC6308_ODR_MASK,
|
||||
FIELD_PREP(QMC6308_ODR_MASK, i));
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
data->odr = i;
|
||||
|
||||
return 0;
|
||||
}
|
||||
case IIO_CHAN_INFO_OVERSAMPLING_RATIO: {
|
||||
for (i = 0; i < ARRAY_SIZE(qmc6308_osr1_avail); i++) {
|
||||
if (val == qmc6308_osr1_avail[i])
|
||||
break;
|
||||
}
|
||||
if (i == ARRAY_SIZE(qmc6308_osr1_avail))
|
||||
return -EINVAL;
|
||||
|
||||
guard(mutex)(&data->mutex);
|
||||
|
||||
ret = regmap_update_bits(data->regmap, QMC6308_REG_CTRL1,
|
||||
QMC6308_OSR1_MASK,
|
||||
FIELD_PREP(QMC6308_OSR1_MASK, i));
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
data->osr = i;
|
||||
|
||||
return 0;
|
||||
}
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
static int qmc6308_read_avail(struct iio_dev *indio_dev,
|
||||
struct iio_chan_spec const *chan,
|
||||
const int **vals, int *type, int *length,
|
||||
long mask)
|
||||
{
|
||||
switch (mask) {
|
||||
case IIO_CHAN_INFO_SAMP_FREQ:
|
||||
*vals = qmc6308_odr_avail;
|
||||
*type = IIO_VAL_INT;
|
||||
*length = ARRAY_SIZE(qmc6308_odr_avail);
|
||||
return IIO_AVAIL_LIST;
|
||||
case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
|
||||
*vals = qmc6308_osr1_avail;
|
||||
*type = IIO_VAL_INT;
|
||||
*length = ARRAY_SIZE(qmc6308_osr1_avail);
|
||||
return IIO_AVAIL_LIST;
|
||||
case IIO_CHAN_INFO_SCALE:
|
||||
*vals = (const int *)qmc6308_scales;
|
||||
*type = IIO_VAL_INT_PLUS_NANO;
|
||||
*length = ARRAY_SIZE(qmc6308_scales) * 2;
|
||||
return IIO_AVAIL_LIST;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
static int qmc6308_write_raw_get_fmt(struct iio_dev *indio_dev,
|
||||
struct iio_chan_spec const *chan,
|
||||
long mask)
|
||||
{
|
||||
switch (mask) {
|
||||
case IIO_CHAN_INFO_SCALE:
|
||||
return IIO_VAL_INT_PLUS_NANO;
|
||||
default:
|
||||
return IIO_VAL_INT;
|
||||
}
|
||||
}
|
||||
|
||||
static const struct iio_mount_matrix *
|
||||
qmc6308_get_mount_matrix(const struct iio_dev *indio_dev,
|
||||
const struct iio_chan_spec *chan)
|
||||
{
|
||||
struct qmc6308_data *data = iio_priv(indio_dev);
|
||||
|
||||
return &data->orientation;
|
||||
}
|
||||
|
||||
static const struct iio_chan_spec_ext_info qmc6308_ext_info[] = {
|
||||
IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, qmc6308_get_mount_matrix),
|
||||
{ }
|
||||
};
|
||||
|
||||
static const struct iio_info qmc6308_info = {
|
||||
.read_raw = qmc6308_read_raw,
|
||||
.write_raw = qmc6308_write_raw,
|
||||
.read_avail = qmc6308_read_avail,
|
||||
.write_raw_get_fmt = qmc6308_write_raw_get_fmt,
|
||||
};
|
||||
|
||||
static int qmc6308_init(struct qmc6308_data *data)
|
||||
{
|
||||
struct regmap *map = data->regmap;
|
||||
unsigned int reg;
|
||||
int ret;
|
||||
|
||||
ret = regmap_read(map, QMC6308_REG_ID, ®);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* Allow unknown IDs so that fallback compatibles work */
|
||||
if (reg != QMC6308_CHIP_ID)
|
||||
dev_warn(regmap_get_device(map),
|
||||
"Unknown chip id: 0x%02x, continuing\n", reg);
|
||||
|
||||
/* The SOFT_RST bit is not auto-cleared and must be written back 0 */
|
||||
ret = regmap_write(map, QMC6308_REG_CTRL2, QMC6308_SOFT_RST);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
fsleep(QMC6308_POR_US);
|
||||
|
||||
data->range = QMC6308_RNG_30G;
|
||||
|
||||
ret = regmap_write(map, QMC6308_REG_CTRL2,
|
||||
FIELD_PREP(QMC6308_SET_RESET_MASK,
|
||||
QMC6308_SET_RESET_ON) |
|
||||
FIELD_PREP(QMC6308_RNG_MASK, data->range));
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
data->odr = QMC6308_ODR_50HZ;
|
||||
data->osr = QMC6308_OSR1_8;
|
||||
|
||||
return regmap_write(map, QMC6308_REG_CTRL1,
|
||||
FIELD_PREP(QMC6308_MODE_MASK,
|
||||
QMC6308_MODE_NORMAL) |
|
||||
FIELD_PREP(QMC6308_ODR_MASK, data->odr) |
|
||||
FIELD_PREP(QMC6308_OSR1_MASK, data->osr));
|
||||
}
|
||||
|
||||
static void qmc6308_power_down_action(void *priv)
|
||||
{
|
||||
struct qmc6308_data *data = priv;
|
||||
|
||||
if (!pm_runtime_status_suspended(regmap_get_device(data->regmap)))
|
||||
qmc6308_set_mode(data, QMC6308_MODE_SUSPEND);
|
||||
}
|
||||
|
||||
static bool qmc6308_volatile_reg(struct device *dev, unsigned int reg)
|
||||
{
|
||||
return reg >= QMC6308_REG_X_LSB && reg <= QMC6308_REG_STATUS;
|
||||
}
|
||||
|
||||
static bool qmc6308_writable_reg(struct device *dev, unsigned int reg)
|
||||
{
|
||||
switch (reg) {
|
||||
case QMC6308_REG_CTRL1:
|
||||
case QMC6308_REG_CTRL2:
|
||||
case QMC6308_REG_CTRL3:
|
||||
case QMC6308_REG_CTRL4:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
static const struct regmap_config qmc6308_regmap_config = {
|
||||
.reg_bits = 8,
|
||||
.val_bits = 8,
|
||||
.max_register = QMC6308_REG_CTRL4,
|
||||
.cache_type = REGCACHE_MAPLE,
|
||||
.volatile_reg = qmc6308_volatile_reg,
|
||||
.writeable_reg = qmc6308_writable_reg,
|
||||
};
|
||||
|
||||
#define QMC6308_CHANNEL(_axis) \
|
||||
{ \
|
||||
.type = IIO_MAGN, \
|
||||
.modified = 1, \
|
||||
.channel2 = IIO_MOD_##_axis, \
|
||||
.address = QMC6308_AXIS_##_axis, \
|
||||
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
|
||||
.info_mask_shared_by_type = \
|
||||
BIT(IIO_CHAN_INFO_SCALE) | \
|
||||
BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
|
||||
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
|
||||
.info_mask_shared_by_type_available = \
|
||||
BIT(IIO_CHAN_INFO_SCALE) | \
|
||||
BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
|
||||
BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
|
||||
.ext_info = qmc6308_ext_info, \
|
||||
}
|
||||
|
||||
static const struct iio_chan_spec qmc6308_channels[] = {
|
||||
QMC6308_CHANNEL(X),
|
||||
QMC6308_CHANNEL(Y),
|
||||
QMC6308_CHANNEL(Z),
|
||||
};
|
||||
|
||||
static int qmc6308_probe(struct i2c_client *client)
|
||||
{
|
||||
struct device *dev = &client->dev;
|
||||
struct qmc6308_data *data;
|
||||
struct iio_dev *indio_dev;
|
||||
struct regmap *map;
|
||||
int ret;
|
||||
|
||||
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
|
||||
if (!indio_dev)
|
||||
return -ENOMEM;
|
||||
|
||||
i2c_set_clientdata(client, indio_dev);
|
||||
|
||||
map = devm_regmap_init_i2c(client, &qmc6308_regmap_config);
|
||||
if (IS_ERR(map))
|
||||
return dev_err_probe(dev, PTR_ERR(map),
|
||||
"regmap initialization failed\n");
|
||||
|
||||
ret = devm_regulator_get_enable(dev, "vdd");
|
||||
if (ret)
|
||||
return dev_err_probe(dev, ret,
|
||||
"Failed to enable VDD regulator\n");
|
||||
|
||||
fsleep(QMC6308_POR_US);
|
||||
|
||||
data = iio_priv(indio_dev);
|
||||
data->regmap = map;
|
||||
|
||||
ret = devm_mutex_init(dev, &data->mutex);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = iio_read_mount_matrix(dev, &data->orientation);
|
||||
if (ret)
|
||||
return dev_err_probe(dev, ret,
|
||||
"Failed to read mount matrix\n");
|
||||
|
||||
indio_dev->name = "qmc6308";
|
||||
indio_dev->info = &qmc6308_info;
|
||||
indio_dev->channels = qmc6308_channels;
|
||||
indio_dev->num_channels = ARRAY_SIZE(qmc6308_channels);
|
||||
indio_dev->modes = INDIO_DIRECT_MODE;
|
||||
|
||||
ret = qmc6308_init(data);
|
||||
if (ret)
|
||||
return dev_err_probe(dev, ret, "qmc6308 init failed\n");
|
||||
|
||||
pm_runtime_set_active(dev);
|
||||
|
||||
ret = devm_add_action_or_reset(dev, qmc6308_power_down_action, data);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
pm_runtime_get_noresume(dev);
|
||||
pm_runtime_use_autosuspend(dev);
|
||||
pm_runtime_set_autosuspend_delay(dev, QMC6308_AUTOSUSPEND_DELAY_MS);
|
||||
ret = devm_pm_runtime_enable(dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
pm_runtime_put_autosuspend(dev);
|
||||
|
||||
return devm_iio_device_register(dev, indio_dev);
|
||||
}
|
||||
|
||||
static int qmc6308_runtime_suspend(struct device *dev)
|
||||
{
|
||||
struct iio_dev *indio_dev = dev_get_drvdata(dev);
|
||||
struct qmc6308_data *data = iio_priv(indio_dev);
|
||||
|
||||
return qmc6308_set_mode(data, QMC6308_MODE_SUSPEND);
|
||||
}
|
||||
|
||||
static int qmc6308_runtime_resume(struct device *dev)
|
||||
{
|
||||
struct iio_dev *indio_dev = dev_get_drvdata(dev);
|
||||
struct qmc6308_data *data = iio_priv(indio_dev);
|
||||
unsigned int status;
|
||||
int ret;
|
||||
|
||||
ret = qmc6308_set_mode(data, QMC6308_MODE_NORMAL);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/*
|
||||
* DRDY may still be set for a sample converted before the last
|
||||
* suspend; clear it so the next read waits for fresh data.
|
||||
*/
|
||||
return regmap_read(data->regmap, QMC6308_REG_STATUS, &status);
|
||||
}
|
||||
|
||||
static DEFINE_RUNTIME_DEV_PM_OPS(qmc6308_pm_ops, qmc6308_runtime_suspend,
|
||||
qmc6308_runtime_resume, NULL);
|
||||
|
||||
static const struct of_device_id qmc6308_match[] = {
|
||||
{ .compatible = "qstcorp,qmc6308" },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, qmc6308_match);
|
||||
|
||||
static const struct i2c_device_id qmc6308_id[] = {
|
||||
{ .name = "qmc6308" },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(i2c, qmc6308_id);
|
||||
|
||||
static struct i2c_driver qmc6308_driver = {
|
||||
.driver = {
|
||||
.name = "qmc6308",
|
||||
.of_match_table = qmc6308_match,
|
||||
.pm = pm_ptr(&qmc6308_pm_ops),
|
||||
},
|
||||
.id_table = qmc6308_id,
|
||||
.probe = qmc6308_probe,
|
||||
};
|
||||
module_i2c_driver(qmc6308_driver);
|
||||
|
||||
MODULE_DESCRIPTION("QST QMC6308 3-Axis Magnetic Sensor driver");
|
||||
MODULE_AUTHOR("Jorijn van der Graaf <jorijnvdgraaf@catcrafts.net>");
|
||||
MODULE_LICENSE("Dual BSD/GPL");
|
||||
Loading…
Add table
Add a link
Reference in a new issue