arm64: errata: Mitigate TLBI errata on Microsoft Azure Cobalt 100 CPU
commit 1940e70a8144bf75e6df26bf6f600862ea7f7ea1 upstream.
Commit fb091ff394 ("arm64: Subscribe Microsoft Azure Cobalt 100 to ARM
Neoverse N2 errata") states that Microsoft Azure Cobalt 100 CPU "is a
Microsoft implemented CPU based on r0p0 of the ARM Neoverse N2 CPU, and
therefore suffers from all the same errata.".
So enable the workaround for the latest broadcast TLB invalidation bug
on these parts.
Signed-off-by: Will Deacon <will@kernel.org>
[Mark: backport to v7.1.y]
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
845c842eb2
commit
fc10eff5a2
3 changed files with 4 additions and 0 deletions
|
|
@ -367,3 +367,5 @@ stable kernels.
|
|||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| Microsoft | Azure Cobalt 100| #3324339 | ARM64_ERRATUM_3194386 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| Microsoft | Azure Cobalt 100| #4193789 | ARM64_ERRATUM_4118414 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
|
|
|
|||
|
|
@ -1182,6 +1182,7 @@ config ARM64_ERRATUM_4118414
|
|||
* ARM Neoverse-V2 erratum 4193787
|
||||
* ARM Neoverse-V3 erratum 4193784
|
||||
* ARM Neoverse-V3AE erratum 4193784
|
||||
* Microsoft Azure Cobalt 100 4193789
|
||||
* NVIDIA Olympus erratum T410-OLY-1029
|
||||
|
||||
On affected cores, some memory accesses might not be completed by
|
||||
|
|
|
|||
|
|
@ -365,6 +365,7 @@ static const struct arm64_cpu_capabilities arm64_repeat_tlbi_list[] = {
|
|||
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3),
|
||||
MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3AE),
|
||||
MIDR_ALL_VERSIONS(MIDR_NVIDIA_OLYMPUS),
|
||||
MIDR_ALL_VERSIONS(MIDR_MICROSOFT_AZURE_COBALT_100),
|
||||
{}
|
||||
})),
|
||||
},
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue