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soc: fixes for 7.3, part 3

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Two more small fixes came in, both addressing corner cases in platform
 specific code: the microchip mpfs system controller probe and the CPU
 power management on 32-bit rockchips SoCs.
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Merge tag 'soc-fixes-7.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC fixes from Arnd Bergmann:
 "Two more small fixes came in, both addressing corner cases in platform
  specific code: the microchip mpfs system controller probe and the CPU
  power management on 32-bit rockchips SoCs"

* tag 'soc-fixes-7.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  ARM: rockchip: keep reset control around
  soc: microchip: mpfs-sys-controller: fix resource leak on probe error
This commit is contained in:
Linus Torvalds 2026-06-12 08:44:56 -07:00
commit fd41dc46db
2 changed files with 14 additions and 8 deletions
Download patch file Download diff file Expand all files Collapse all files

16
arch/arm/mach-rockchip/platsmp.c
View file

@ -34,6 +34,7 @@ static int ncores;
static struct regmap *pmu;
static int has_pmu = true;
static struct reset_control *cpu_rstc[4];
static int pmu_power_domain_is_on(int pd)
{
@ -64,9 +65,11 @@ static struct reset_control *rockchip_get_core_reset(int cpu)
static int pmu_set_power_domain(int pd, bool on)
{
u32 val = (on) ? 0 : BIT(pd);
struct reset_control *rstc = rockchip_get_core_reset(pd);
struct reset_control *rstc;
int ret;
rstc = pd < ARRAY_SIZE(cpu_rstc) ? cpu_rstc[pd] : ERR_PTR(-EINVAL);
if (IS_ERR(rstc) && read_cpuid_part() != ARM_CPU_PART_CORTEX_A9) {
pr_err("%s: could not get reset control for core %d\n",
__func__, pd);
@ -100,11 +103,8 @@ static int pmu_set_power_domain(int pd, bool on)
}
}
if (!IS_ERR(rstc)) {
if (on)
reset_control_deassert(rstc);
reset_control_put(rstc);
}
if (!IS_ERR(rstc) && on)
reset_control_deassert(rstc);
return 0;
}
@ -312,6 +312,10 @@ static void __init rockchip_smp_prepare_cpus(unsigned int max_cpus)
ncores = ((l2ctlr >> 24) & 0x3) + 1;
}
/* Collect cpu core reset control for each core */
for (i = 0; i < ncores; i++)
cpu_rstc[i] = rockchip_get_core_reset(i);
/* Make sure that all cores except the first are really off */
for (i = 1; i < ncores; i++)
pmu_set_power_domain(0 + i, false);

6
drivers/soc/microchip/mpfs-sys-controller.c
View file

@ -158,8 +158,8 @@ no_flash:
of_data = (struct mpfs_syscon_config *) device_get_match_data(dev);
if (!of_data) {
dev_err(dev, "Error getting match data\n");
return -EINVAL;
ret = dev_err_probe(dev, -EINVAL, "Error getting match data\n");
goto out_free_channel;
}
for (i = 0; i < of_data->nb_subdevs; i++) {
@ -173,6 +173,8 @@ no_flash:
return 0;
out_free_channel:
mbox_free_channel(sys_controller->chan);
out_free:
kfree(sys_controller);
return ret;