Jorijn van der Graaf
2c0dbc3bd6
Wire the FP6's SENARY_MI2S_RX dai to the q6prm SEN_MI2S_IBIT clock via the new dai@ subnode binding, and set mi2s_bclk_enable in the milos board data so the machine driver votes the bit clock at hw_params. Experiment: does the IBIT vote alone put BCLK on the wire before GRAPH_START, satisfying aw88261's synchronous power-up clock check? The prepare-start carry is reverted on this branch; if audio works, the vendor clock series replaces our q6apm-prepare RFC. |
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| .. | ||
| ac97 | ||
| aoa | ||
| arm | ||
| atmel | ||
| core | ||
| drivers | ||
| firewire | ||
| hda | ||
| i2c | ||
| isa | ||
| mips | ||
| oss | ||
| parisc | ||
| pci | ||
| pcmcia | ||
| ppc | ||
| sh | ||
| soc | ||
| sparc | ||
| spi | ||
| synth | ||
| usb | ||
| virtio | ||
| x86 | ||
| xen | ||
| ac97_bus.c | ||
| Kconfig | ||
| last.c | ||
| Makefile | ||
| sound_core.c | ||