The 8 and 16 bit read-modify-write atomic instructions amadd.{b/h} and
amswap.{b/h} were newly added in the latest LoongArch Reference Manual,
define the instruction format and check whether support via CPUCFG.
Furthermore, define the instruction format for DBAR which will be used
to support BPF load-acquire and store-release instructions.
This is preparation for later patches.
Acked-by: Hengqi Chen <hengqi.chen@gmail.com>
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
24 lines
848 B
C
24 lines
848 B
C
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
|
|
#ifndef _UAPI_ASM_HWCAP_H
|
|
#define _UAPI_ASM_HWCAP_H
|
|
|
|
/* HWCAP flags */
|
|
#define HWCAP_LOONGARCH_CPUCFG (1 << 0)
|
|
#define HWCAP_LOONGARCH_LAM (1 << 1)
|
|
#define HWCAP_LOONGARCH_UAL (1 << 2)
|
|
#define HWCAP_LOONGARCH_FPU (1 << 3)
|
|
#define HWCAP_LOONGARCH_LSX (1 << 4)
|
|
#define HWCAP_LOONGARCH_LASX (1 << 5)
|
|
#define HWCAP_LOONGARCH_CRC32 (1 << 6)
|
|
#define HWCAP_LOONGARCH_COMPLEX (1 << 7)
|
|
#define HWCAP_LOONGARCH_CRYPTO (1 << 8)
|
|
#define HWCAP_LOONGARCH_LVZ (1 << 9)
|
|
#define HWCAP_LOONGARCH_LBT_X86 (1 << 10)
|
|
#define HWCAP_LOONGARCH_LBT_ARM (1 << 11)
|
|
#define HWCAP_LOONGARCH_LBT_MIPS (1 << 12)
|
|
#define HWCAP_LOONGARCH_PTW (1 << 13)
|
|
#define HWCAP_LOONGARCH_LSPW (1 << 14)
|
|
#define HWCAP_LOONGARCH_SCQ (1 << 15)
|
|
#define HWCAP_LOONGARCH_LAM_BH (1 << 16)
|
|
|
|
#endif /* _UAPI_ASM_HWCAP_H */
|