perf(image): batch final mip-chain layout transition (#70) #100

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catbot merged 1 commit from claude/issue-70 into master

2026-06-16 20:31:16 +02:00

catbot commented

2026-06-16 20:31:12 +02:00

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Summary

The mip-chain texture-upload path issued N+1 layout-transition barriers per chain, one vkCmdPipelineBarrier per call. The final blit's destination level is never read again, so its dedicated TRANSFER_DST → TRANSFER_SRC barrier was redundant — that level was only transitioned to SRC to keep the closing SRC → consumer transition uniform.

This change skips that last per-level barrier and folds the final level into the closing transition, which now batches two VkImageMemoryBarrier entries into a single vkCmdPipelineBarrier:

levels [0, mipLevels-1): TRANSFER_SRC_OPTIMAL → consumer layout
level mipLevels-1: TRANSFER_DST_OPTIMAL → consumer layout

Net: one fewer barrier call per mip-chain. The N-1 interleaved per-level barriers stay one-at-a-time — each is correctness-mandated because the next blit reads the level it transitions (as noted in the issue). Applied to both the host-upload and GPU-decompress Update paths.

Testing

New MipChainBarrierBatch regression test drives the pure barrier builder (BuildMipChainFinalBarriers) directly — verifies exactly two batched barriers, correct old/new layouts, access masks, and that the two level groups tile [0, mipLevels) with no gap or overlap. No GPU device needed, mirroring MemoryTypeFallback/UploadStrategy.
crafter-build test: all 15 tests pass.

Resolves #70

🤖 Generated with Claude Code

## Summary The mip-chain texture-upload path issued `N+1` layout-transition barriers per chain, one `vkCmdPipelineBarrier` per call. The final blit's destination level is never read again, so its dedicated `TRANSFER_DST → TRANSFER_SRC` barrier was redundant — that level was only transitioned to SRC to keep the closing `SRC → consumer` transition uniform. This change skips that last per-level barrier and folds the final level into the closing transition, which now batches two `VkImageMemoryBarrier` entries into a **single** `vkCmdPipelineBarrier`: - levels `[0, mipLevels-1)`: `TRANSFER_SRC_OPTIMAL → consumer layout` - level `mipLevels-1`: `TRANSFER_DST_OPTIMAL → consumer layout` Net: one fewer barrier call per mip-chain. The `N-1` interleaved per-level barriers stay one-at-a-time — each is correctness-mandated because the next blit reads the level it transitions (as noted in the issue). Applied to both the host-upload and GPU-decompress `Update` paths. ## Testing - New `MipChainBarrierBatch` regression test drives the pure barrier builder (`BuildMipChainFinalBarriers`) directly — verifies exactly two batched barriers, correct old/new layouts, access masks, and that the two level groups tile `[0, mipLevels)` with no gap or overlap. No GPU device needed, mirroring `MemoryTypeFallback`/`UploadStrategy`. - `crafter-build test`: all 15 tests pass. Resolves #70 🤖 Generated with [Claude Code](https://claude.com/claude-code)

catbot added 1 commit

2026-06-16 20:31:12 +02:00

perf(image): batch final mip-chain layout transition (#70 ) 518509aa0e

The mip-generation upload path issued N+1 layout-transition barriers per
chain. The final blit's destination level is never read again, so its
dedicated TRANSFER_DST -> TRANSFER_SRC barrier was redundant: the level was
transitioned to SRC only to keep the final SRC -> consumer transition uniform.

Skip that last per-level barrier and fold the final level into the closing
transition, which now batches two VkImageMemoryBarrier entries
([0, mipLevels-1) from TRANSFER_SRC, the last level from TRANSFER_DST) into a
single vkCmdPipelineBarrier. One fewer barrier call per chain; the N-1
interleaved per-level barriers stay one-at-a-time since each is read by the
next blit. Applied to both the host-upload and GPU-decompress Update paths.

Adds the MipChainBarrierBatch regression test driving the pure barrier
builder (no GPU device needed).

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

catbot merged commit e86facc2af into master

2026-06-16 20:31:16 +02:00

catbot deleted branch claude/issue-70

2026-06-16 20:31:16 +02:00

catbot referenced this pull request from a commit

2026-06-16 20:31:18 +02:00

Merge pull request 'perf(image): batch final mip-chain layout transition (#70)' (#100) from claude/issue-70 into master