NEON backend for VectorF32 on AArch64: one float32x4_t per vector
(Len * Packing <= 4), with a vectorised sin/cos port of the SSE helpers.

VectorF16 gets a native float16x8_t path when the target has ARMv8.2-FP16
arithmetic. Without it VectorF16 aliases VectorF32, which converts
fp16 <-> fp32 on Load/Store.

The scalar fallback gains the batched Dot that MatrixRowMajor relies on.
Test tiers added for armv8-a and armv8.2-a+fp16.

Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
This commit is contained in:
Jorijn van der Graaf 2026-10-06 17:13:54 +02:00
commit 0c55e76873
Signed by: jorijnvdgraaf
GPG key ID: 2937E59CDCC1BCFB
6 changed files with 825 additions and 17 deletions

View file

@ -46,12 +46,22 @@ extern "C" Configuration CrafterBuildProject(std::span<const std::string_view> a
{"rv64gcv", "generic"},
}};
// AArch64 has a single NEON register width (128-bit), so the tiers
// differ in VectorF16 only: ARMv8.2-FP16 gives it a native half-precision
// path, the baseline aliases it to VectorF32.
std::array<MarchTier, 2> armTiers = {{
{"armv8.2-a+fp16", "generic"},
{"armv8-a", "generic"},
}};
const std::string_view target = cfg.target;
const bool isX86 = target.starts_with("x86_64") || target.starts_with("i686");
const bool isRiscv = target.starts_with("riscv");
const bool isArm = target.starts_with("aarch64");
for (std::string_view name : { "Vector", "Intersection", "Matrix" }) {
if (isX86) cfg.AddMarchVariants(name, mathInterfaces, x86Tiers);
if (isRiscv) cfg.AddMarchVariants(name, mathInterfaces, riscvTiers);
if (isArm) cfg.AddMarchVariants(name, mathInterfaces, armTiers);
}
return cfg;