Add support for MI2S clock control within q6apm-lpass DAIs, including handling of MCLK, BCLK, and ECLK via the DAI .set_sysclk callback. Each MI2S port now retrieves its clock handles from the device tree, allowing per-port clock configuration and proper enable/disable during startup and shutdown. Co-developed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
491 lines
13 KiB
C
491 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// Copyright (c) 2021, Linaro Limited
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#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <sound/pcm.h>
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#include <sound/soc.h>
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#include <sound/pcm_params.h>
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#include "q6dsp-lpass-ports.h"
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#include "q6dsp-common.h"
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#include "audioreach.h"
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#include "q6apm.h"
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#include "q6prm.h"
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#define AUDIOREACH_BE_PCM_BASE 16
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struct q6apm_dai_priv_data {
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struct clk *mclk;
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struct clk *bclk;
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struct clk *eclk;
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bool mclk_enabled, bclk_enabled, eclk_enabled;
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};
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struct q6apm_lpass_dai_data {
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struct q6apm_graph *graph[APM_PORT_MAX];
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bool is_port_started[APM_PORT_MAX];
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struct audioreach_module_config module_config[APM_PORT_MAX];
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struct q6apm_dai_priv_data priv[APM_PORT_MAX];
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};
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static int q6dma_set_channel_map(struct snd_soc_dai *dai,
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unsigned int tx_num,
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const unsigned int *tx_ch_mask,
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unsigned int rx_num,
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const unsigned int *rx_ch_mask)
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{
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struct q6apm_lpass_dai_data *dai_data = dev_get_drvdata(dai->dev);
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struct audioreach_module_config *cfg = &dai_data->module_config[dai->id];
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int i;
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switch (dai->id) {
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case WSA_CODEC_DMA_TX_0:
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case WSA_CODEC_DMA_TX_1:
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case WSA_CODEC_DMA_TX_2:
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case VA_CODEC_DMA_TX_0:
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case VA_CODEC_DMA_TX_1:
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case VA_CODEC_DMA_TX_2:
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case TX_CODEC_DMA_TX_0:
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case TX_CODEC_DMA_TX_1:
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case TX_CODEC_DMA_TX_2:
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case TX_CODEC_DMA_TX_3:
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case TX_CODEC_DMA_TX_4:
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case TX_CODEC_DMA_TX_5:
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if (!tx_ch_mask) {
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dev_err(dai->dev, "tx slot not found\n");
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return -EINVAL;
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}
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if (tx_num > AR_PCM_MAX_NUM_CHANNEL) {
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dev_err(dai->dev, "invalid tx num %d\n",
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tx_num);
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return -EINVAL;
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}
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for (i = 0; i < tx_num; i++)
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cfg->channel_map[i] = tx_ch_mask[i];
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break;
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case WSA_CODEC_DMA_RX_0:
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case WSA_CODEC_DMA_RX_1:
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case RX_CODEC_DMA_RX_0:
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case RX_CODEC_DMA_RX_1:
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case RX_CODEC_DMA_RX_2:
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case RX_CODEC_DMA_RX_3:
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case RX_CODEC_DMA_RX_4:
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case RX_CODEC_DMA_RX_5:
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case RX_CODEC_DMA_RX_6:
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case RX_CODEC_DMA_RX_7:
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/* rx */
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if (!rx_ch_mask) {
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dev_err(dai->dev, "rx slot not found\n");
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return -EINVAL;
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}
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if (rx_num > APM_PORT_MAX_AUDIO_CHAN_CNT) {
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dev_err(dai->dev, "invalid rx num %d\n",
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rx_num);
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return -EINVAL;
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}
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for (i = 0; i < rx_num; i++)
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cfg->channel_map[i] = rx_ch_mask[i];
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break;
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default:
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dev_err(dai->dev, "%s: invalid dai id 0x%x\n",
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__func__, dai->id);
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return -EINVAL;
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}
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return 0;
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}
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static int q6hdmi_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
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{
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struct q6apm_lpass_dai_data *dai_data = dev_get_drvdata(dai->dev);
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struct audioreach_module_config *cfg = &dai_data->module_config[dai->id];
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int channels = hw_param_interval_c(params, SNDRV_PCM_HW_PARAM_CHANNELS)->max;
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int ret;
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cfg->bit_width = params_width(params);
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cfg->sample_rate = params_rate(params);
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cfg->num_channels = channels;
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audioreach_set_default_channel_mapping(cfg->channel_map, channels);
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switch (dai->id) {
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case DISPLAY_PORT_RX_0:
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cfg->dp_idx = 0;
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break;
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case DISPLAY_PORT_RX_1 ... DISPLAY_PORT_RX_7:
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cfg->dp_idx = dai->id - DISPLAY_PORT_RX_1 + 1;
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break;
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}
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ret = q6dsp_get_channel_allocation(channels);
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if (ret < 0)
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return ret;
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cfg->channel_allocation = ret;
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return 0;
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}
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static int q6dma_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
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{
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struct q6apm_lpass_dai_data *dai_data = dev_get_drvdata(dai->dev);
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struct audioreach_module_config *cfg = &dai_data->module_config[dai->id];
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int channels = hw_param_interval_c(params, SNDRV_PCM_HW_PARAM_CHANNELS)->max;
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cfg->bit_width = params_width(params);
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cfg->sample_rate = params_rate(params);
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cfg->num_channels = channels;
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audioreach_set_default_channel_mapping(cfg->channel_map, channels);
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return 0;
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}
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static void q6apm_lpass_dai_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
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{
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struct q6apm_lpass_dai_data *dai_data = dev_get_drvdata(dai->dev);
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int rc;
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if (dai_data->is_port_started[dai->id]) {
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rc = q6apm_graph_stop(dai_data->graph[dai->id]);
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dai_data->is_port_started[dai->id] = false;
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if (rc < 0)
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dev_err(dai->dev, "failed to stop APM port (%d)\n", rc);
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}
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if (dai_data->graph[dai->id]) {
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q6apm_graph_close(dai_data->graph[dai->id]);
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dai_data->graph[dai->id] = NULL;
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}
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}
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static int q6apm_lpass_dai_trigger(struct snd_pcm_substream *substream, int cmd,
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struct snd_soc_dai *dai)
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{
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struct q6apm_lpass_dai_data *dai_data = dev_get_drvdata(dai->dev);
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int ret = 0;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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if (!dai_data->is_port_started[dai->id]) {
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ret = q6apm_graph_start(dai_data->graph[dai->id]);
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if (ret < 0)
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dev_err(dai->dev, "Failed to start APM port %d\n", dai->id);
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else
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dai_data->is_port_started[dai->id] = true;
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}
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break;
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default:
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break;
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}
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return ret;
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}
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static int q6apm_lpass_dai_prepare(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
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{
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struct q6apm_lpass_dai_data *dai_data = dev_get_drvdata(dai->dev);
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struct audioreach_module_config *cfg = &dai_data->module_config[dai->id];
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struct q6apm_graph *graph;
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int graph_id = dai->id;
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int rc;
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if (dai_data->is_port_started[dai->id]) {
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q6apm_graph_stop(dai_data->graph[dai->id]);
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dai_data->is_port_started[dai->id] = false;
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}
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/**
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* It is recommend to load DSP with source graph first and then sink
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* graph, so sequence for playback and capture will be different
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*/
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK && dai_data->graph[dai->id] == NULL) {
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graph = q6apm_graph_open(dai->dev, NULL, dai->dev, graph_id, substream->stream);
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if (IS_ERR(graph)) {
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dev_err(dai->dev, "Failed to open graph (%d)\n", graph_id);
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rc = PTR_ERR(graph);
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return rc;
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}
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dai_data->graph[graph_id] = graph;
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}
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cfg->direction = substream->stream;
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rc = q6apm_graph_media_format_pcm(dai_data->graph[dai->id], cfg);
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if (rc) {
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dev_err(dai->dev, "Failed to set media format %d\n", rc);
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goto err;
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}
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rc = q6apm_graph_prepare(dai_data->graph[dai->id]);
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if (rc) {
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dev_err(dai->dev, "Failed to prepare Graph %d\n", rc);
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goto err;
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}
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return 0;
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err:
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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q6apm_graph_close(dai_data->graph[dai->id]);
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dai_data->graph[dai->id] = NULL;
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}
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return rc;
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}
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static int q6apm_lpass_dai_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
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{
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struct q6apm_lpass_dai_data *dai_data = dev_get_drvdata(dai->dev);
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struct q6apm_graph *graph;
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int graph_id = dai->id;
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
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graph = q6apm_graph_open(dai->dev, NULL, dai->dev, graph_id, substream->stream);
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if (IS_ERR(graph)) {
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dev_err(dai->dev, "Failed to open graph (%d)\n", graph_id);
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return PTR_ERR(graph);
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}
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dai_data->graph[graph_id] = graph;
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}
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return 0;
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}
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static int q6i2s_dai_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
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{
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return q6apm_lpass_dai_startup(substream, dai);
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}
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static void q6i2s_lpass_dai_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
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{
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struct q6apm_lpass_dai_data *dai_data = dev_get_drvdata(dai->dev);
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if (dai_data->priv[dai->id].mclk_enabled) {
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clk_disable_unprepare(dai_data->priv[dai->id].mclk);
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dai_data->priv[dai->id].mclk_enabled = false;
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}
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if (dai_data->priv[dai->id].bclk_enabled) {
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clk_disable_unprepare(dai_data->priv[dai->id].bclk);
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dai_data->priv[dai->id].bclk_enabled = false;
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}
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if (dai_data->priv[dai->id].eclk_enabled) {
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clk_disable_unprepare(dai_data->priv[dai->id].eclk);
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dai_data->priv[dai->id].eclk_enabled = false;
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}
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q6apm_lpass_dai_shutdown(substream, dai);
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}
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static int q6i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id, unsigned int freq, int dir)
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{
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struct q6apm_lpass_dai_data *dai_data = dev_get_drvdata(dai->dev);
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struct clk *sysclk = NULL;
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bool *enabled = NULL;
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int ret = 0;
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switch (clk_id) {
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case LPAIF_MI2S_MCLK:
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sysclk = dai_data->priv[dai->id].mclk;
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enabled = &dai_data->priv[dai->id].mclk_enabled;
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break;
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case LPAIF_MI2S_BCLK:
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sysclk = dai_data->priv[dai->id].bclk;
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enabled = &dai_data->priv[dai->id].bclk_enabled;
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break;
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case LPAIF_MI2S_ECLK:
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sysclk = dai_data->priv[dai->id].eclk;
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enabled = &dai_data->priv[dai->id].eclk_enabled;
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break;
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default:
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return -EINVAL;
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}
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if (sysclk) {
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if (*enabled)
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return 0;
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clk_set_rate(sysclk, freq);
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ret = clk_prepare_enable(sysclk);
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if (ret) {
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dev_err(dai->dev, "Error, Unable to prepare (%d) sysclk\n", clk_id);
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return ret;
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}
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*enabled = true;
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}
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return ret;
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}
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static int q6i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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{
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struct q6apm_lpass_dai_data *dai_data = dev_get_drvdata(dai->dev);
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struct audioreach_module_config *cfg = &dai_data->module_config[dai->id];
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cfg->fmt = fmt;
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return 0;
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}
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static const struct snd_soc_dai_ops q6dma_ops = {
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.prepare = q6apm_lpass_dai_prepare,
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.startup = q6apm_lpass_dai_startup,
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.shutdown = q6apm_lpass_dai_shutdown,
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.set_channel_map = q6dma_set_channel_map,
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.hw_params = q6dma_hw_params,
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.trigger = q6apm_lpass_dai_trigger,
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};
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static const struct snd_soc_dai_ops q6i2s_ops = {
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.prepare = q6apm_lpass_dai_prepare,
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.startup = q6i2s_dai_startup,
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.shutdown = q6i2s_lpass_dai_shutdown,
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.set_channel_map = q6dma_set_channel_map,
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.hw_params = q6dma_hw_params,
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.set_fmt = q6i2s_set_fmt,
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.set_sysclk = q6i2s_set_sysclk,
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.trigger = q6apm_lpass_dai_trigger,
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};
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static const struct snd_soc_dai_ops q6hdmi_ops = {
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.prepare = q6apm_lpass_dai_prepare,
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.startup = q6apm_lpass_dai_startup,
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.shutdown = q6apm_lpass_dai_shutdown,
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.hw_params = q6hdmi_hw_params,
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.set_fmt = q6i2s_set_fmt,
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.trigger = q6apm_lpass_dai_trigger,
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};
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static const struct snd_soc_component_driver q6apm_lpass_dai_component = {
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.name = "q6apm-be-dai-component",
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.of_xlate_dai_name = q6dsp_audio_ports_of_xlate_dai_name,
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.be_pcm_base = AUDIOREACH_BE_PCM_BASE,
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.use_dai_pcm_id = true,
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.remove_order = SND_SOC_COMP_ORDER_FIRST,
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};
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static int of_q6apm_parse_dai_data(struct device *dev,
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struct q6apm_lpass_dai_data *data)
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{
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int ret;
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for_each_child_of_node_scoped(dev->of_node, node) {
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struct q6apm_dai_priv_data *priv;
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int id;
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ret = of_property_read_u32(node, "reg", &id);
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if (ret || id < 0 || id >= APM_PORT_MAX) {
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dev_err(dev, "valid dai id not found:%d\n", ret);
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continue;
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}
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switch (id) {
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/* MI2S specific properties */
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case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX:
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case QUINARY_MI2S_RX ... QUINARY_MI2S_TX:
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case SENARY_MI2S_RX ... SENARY_MI2S_TX:
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priv = &data->priv[id];
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priv->mclk = of_clk_get_by_name(node, "mclk");
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if (IS_ERR(priv->mclk)) {
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if (PTR_ERR(priv->mclk) == -EPROBE_DEFER)
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return dev_err_probe(dev, PTR_ERR(priv->mclk),
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"unable to get mi2s mclk\n");
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priv->mclk = NULL;
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}
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priv->bclk = of_clk_get_by_name(node, "bclk");
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if (IS_ERR(priv->bclk)) {
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if (PTR_ERR(priv->bclk) == -EPROBE_DEFER) {
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if (priv->mclk) {
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clk_put(priv->mclk);
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priv->mclk = NULL;
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}
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return dev_err_probe(dev, PTR_ERR(priv->bclk),
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"unable to get mi2s bclk\n");
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}
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priv->bclk = NULL;
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}
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priv->eclk = of_clk_get_by_name(node, "eclk");
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if (IS_ERR(priv->eclk)) {
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if (PTR_ERR(priv->eclk) == -EPROBE_DEFER) {
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if (priv->mclk) {
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clk_put(priv->mclk);
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priv->mclk = NULL;
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}
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if (priv->bclk) {
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clk_put(priv->bclk);
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priv->bclk = NULL;
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}
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return dev_err_probe(dev, PTR_ERR(priv->eclk),
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"unable to get mi2s eclk\n");
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}
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priv->eclk = NULL;
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}
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break;
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default:
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break;
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}
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}
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return 0;
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}
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static int q6apm_lpass_dai_dev_probe(struct platform_device *pdev)
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{
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struct q6dsp_audio_port_dai_driver_config cfg;
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struct q6apm_lpass_dai_data *dai_data;
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|
struct snd_soc_dai_driver *dais;
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struct device *dev = &pdev->dev;
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|
int num_dais;
|
|
int ret;
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|
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dai_data = devm_kzalloc(dev, sizeof(*dai_data), GFP_KERNEL);
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if (!dai_data)
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|
return -ENOMEM;
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|
|
|
dev_set_drvdata(dev, dai_data);
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ret = of_q6apm_parse_dai_data(dev, dai_data);
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if (ret)
|
|
return ret;
|
|
|
|
memset(&cfg, 0, sizeof(cfg));
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|
cfg.q6i2s_ops = &q6i2s_ops;
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|
cfg.q6dma_ops = &q6dma_ops;
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|
cfg.q6hdmi_ops = &q6hdmi_ops;
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|
dais = q6dsp_audio_ports_set_config(dev, &cfg, &num_dais);
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|
|
|
return devm_snd_soc_register_component(dev, &q6apm_lpass_dai_component, dais, num_dais);
|
|
}
|
|
|
|
#ifdef CONFIG_OF
|
|
static const struct of_device_id q6apm_lpass_dai_device_id[] = {
|
|
{ .compatible = "qcom,q6apm-lpass-dais" },
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, q6apm_lpass_dai_device_id);
|
|
#endif
|
|
|
|
static struct platform_driver q6apm_lpass_dai_platform_driver = {
|
|
.driver = {
|
|
.name = "q6apm-lpass-dais",
|
|
.of_match_table = of_match_ptr(q6apm_lpass_dai_device_id),
|
|
},
|
|
.probe = q6apm_lpass_dai_dev_probe,
|
|
};
|
|
module_platform_driver(q6apm_lpass_dai_platform_driver);
|
|
|
|
MODULE_DESCRIPTION("AUDIOREACH APM LPASS dai driver");
|
|
MODULE_LICENSE("GPL");
|