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Author SHA1 Message Date
2c0dbc3bd6 TEST: milos/fp6: enable SEN_MI2S bclk control (Rafi clock series experiment)
Wire the FP6's SENARY_MI2S_RX dai to the q6prm SEN_MI2S_IBIT clock via
the new dai@ subnode binding, and set mi2s_bclk_enable in the milos
board data so the machine driver votes the bit clock at hw_params.

Experiment: does the IBIT vote alone put BCLK on the wire before
GRAPH_START, satisfying aw88261's synchronous power-up clock check?
The prepare-start carry is reverted on this branch; if audio works,
the vendor clock series replaces our q6apm-prepare RFC.
2026-07-08 22:56:00 +02:00
Mohammad Rafi Shaik
56665d3a89 ASoC: qcom: sc8280xp: ASoC: qcom: sc8280xp: enhance machine driver for board-specific config
The sc8280xp machine driver is currently written with a largely
SoC-centric view and assumes a uniform audio topology across all boards.
In practice, multiple products based on the same SoC use different board
designs and external audio components, which require board-specific
configuration to function correctly.

Several Qualcomm platforms like talos integrate third-party audio codecs
or use different external audio paths. These designs often require
additional configuration such as explicit MI2S MCLK settings for audio
to work.

This change enhances the sc8280xp machine driver to support board-specific
configuration such as allowing each board variant to provide its own DAPM
widgets and routes, reflecting the actual audio components and connectors
present and enabling MI2S MCLK programming for boards that use external
codecs requiring a stable master clock.

Tested-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
2026-07-08 22:53:18 +02:00
Mohammad Rafi Shaik
f930864a7c ASoC: qcom: q6apm-lpass-dais: Add MI2S clock control
Add support for MI2S clock control within q6apm-lpass DAIs, including
handling of MCLK, BCLK, and ECLK via the DAI .set_sysclk callback.
Each MI2S port now retrieves its clock handles from the device tree,
allowing per-port clock configuration and proper enable/disable during
startup and shutdown.

Co-developed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
2026-07-08 22:50:19 +02:00
Mohammad Rafi Shaik
0df93b3ece ASoC: dt-bindings: qcom,q6apm-lpass-dais: Document DAI subnode
Extend the qcom,q6apm-lpass-dais device tree binding to explicitly
describe Digital Audio Interface (DAI) child nodes.

Add #address-cells and #size-cells to allow representation of multiple
DAI instances as child nodes, and define a dai@<id> pattern to document
per-DAI properties such as the interface ID and associated clocks.

On platforms such as Monaco and Lemans, third-party codecs are hardware
wired to the SoC and do not always have an in-tree codec driver to manage
their clocks. For these designs, clock line enablement must be driven
from the platform side, and this series provides the necessary support
for that.

On QAIF-based platforms such as Shikra and Hawi, responsibility for voting
I2S MCLK and BCLK has moved from the DSP to the kernel. This series
introduces the required device tree binding support to represent and
vote for these clocks from the kernel.

Co-developed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com>
2026-07-08 22:50:19 +02:00
30d4980ffb Revert "ASoC: qcom: q6apm-lpass-dais: start the graph at prepare"
This reverts commit d571dd42d3.
2026-07-08 22:50:09 +02:00
d36259f54b arm64: dts: qcom: milos: add fastrpc remote heap for the ADSP audio PD
The ADSP audio PD loads its voice post-processing modules (Fluence
NN/EF/pro-vc etc.) as dynamic shared objects fetched from the apps
filesystem at GRAPH_OPEN time through FastRPC (adsprpcd attached with
createstaticpd:audiopd serves the files - /vendor/dsp/adsp on stock).
The static-PD attach allocates a remote heap that must be SCM-assigned
to the DSP: without qcom,vmids the heap stays HLOS-owned and the PD's
first touch kills the SoC instantly (xPU violation, no kernel output).

Add a 12 MiB CMA pool (mirroring downstream's adsp_mem_heap: 32-bit
addressable, 4 MiB aligned) and the LPASS/ADSP_HEAP vmids, following
the sc7280 (kodiak) precedent where upstream audiopd support landed.

Assisted-by: Claude:claude-fable-5
Signed-off-by: Jorijn van der Graaf <jorijnvdgraaf@catcrafts.net>
2026-07-08 01:31:08 +02:00
5f42f9a74a voice-proto: add out-of-band (shared memory) command support
Stock GSL delivers every voice GRAPH_OPEN out-of-band: the whole graph
(all subgraphs plus the cross-subgraph module connections and control
links, 4.3-4.7 KB) must be opened atomically in ONE command, which
exceeds the in-band GPR/GLINK intent limit. Splitting the open
per-subgraph to fit in-band makes the cross-referencing TX DevicePP
subgraph invalid - the root cause of every pp-subgraph open failure
since 2026-07-06 (byte-identical payloads open fine when sent whole;
verified against a gsl_log.bin packet capture of a working call on
stock Android).

Records with bit 31 set in the opcode are copied into a DMA buffer
allocated from the q6apm-dais device (it carries the ADSP SMMU
mapping), mapped once with the DSP via q6apm_map_memory_fixed_region
under a private graph id, and referenced by absolute DSP address in
the apm_cmd_header (mainline maps in absolute mode; GSL uses offset
mode - the DSP rejects offset references against our mapping).

Assisted-by: Claude:claude-fable-5
Signed-off-by: Jorijn van der Graaf <jorijnvdgraaf@catcrafts.net>
2026-07-08 01:31:08 +02:00
57cbd69e36 Merge branch 'voice' into combined 2026-07-07 20:07:09 +02:00
0c63174949 net: qrtr: forward data packets between endpoints (FP6 voice prototype)
The DSP subsystems are star-connected through the application
processor: each has a qrtr link to us but none to each other. Incoming
packets whose dst_node is neither the local node nor broadcast are
currently delivered to a *local* port matching dst_port (usually
nothing) and dropped, so two remote DSPs can never exchange QMI
messages.

On the FP6 (SM7635, AudioReach) the modem's voice stack needs exactly
that: it must reach the ADSP's service-registry notifier / audio
service to attach the vocoder to a VCPM voice session. Without
forwarding, every voice graph starts cleanly but the modem never
streams a single mailbox packet - calls stay silent both ways (see
journal/calls.md 2026-07-07/08).

Forward DATA and RESUME_TX packets destined to another known node onto
that node's endpoint, re-using qrtr_node_enqueue for per-hop flow
control. RESUME_TX additionally releases this hop's flow token on the
arrival link; per-hop counters stay in lockstep with end-to-end ones
because every packet of a forwarded flow transits this node. Control
packets keep flowing to the local ns, which already redistributes
service announcements mesh-wide.

Prototype for the milos carry; needs discussion (loop prevention,
broadcast handling, flow-control semantics) before any upstream
attempt.

Assisted-by: Claude:claude-fable-5
Signed-off-by: Jorijn van der Graaf <jorijnvdgraaf@catcrafts.net>
2026-07-07 20:07:01 +02:00
3cbf6d6fa8 Merge branch 'voice' into combined 2026-07-06 23:17:04 +02:00
2626032a50 voice-proto: continue on DSP rejections, log each record result
Assisted-by: Claude:claude-fable-5
2026-07-06 23:17:04 +02:00
63b5c43f02 Merge branch 'voice' into combined
Voice-call blob-player prototype (q6apm debugfs).
2026-07-06 23:06:35 +02:00
7695d5e6e4 ASoC: qdsp6: q6apm: add voice-call blob-player prototype (FP6 bring-up)
Replay pre-generated APM command sequences (GRAPH_OPEN/SET_CFG/PREPARE/
START, mined from the stock FP6 ACDB by utilities/mkvoiceblobs.py)
through the q6apm GPR channel via
/sys/kernel/debug/q6apm-voice-proto/play.

Bring-up prototype for cellular voice-call audio: the replayed graphs
contain the VCPM voice config; the modem and the ADSP VCPM service
attach the vocoder to them once a call is active. Local carry only,
NOT for upstream (the upstreamable form will be topology-driven).

Assisted-by: Claude:claude-fable-5
2026-07-06 23:06:35 +02:00
11 changed files with 835 additions and 40 deletions

View file

@ -21,6 +21,47 @@ properties:
'#sound-dai-cells': '#sound-dai-cells':
const: 1 const: 1
'#address-cells':
const: 1
'#size-cells':
const: 0
# Digital Audio Interfaces
patternProperties:
'^dai@[0-9a-f]+$':
type: object
description:
Q6DSP Digital Audio Interfaces.
properties:
reg:
maxItems: 1
description:
Digital Audio Interface ID
clocks:
minItems: 1
items:
- description: MI2S master clock
- description: MI2S bit clock
- description: MI2S external bit clock
clock-names:
minItems: 1
items:
- const: mclk
- const: bclk
- const: eclk
dependencies:
clocks: [clock-names]
required:
- reg
additionalProperties: false
required: required:
- compatible - compatible
- '#sound-dai-cells' - '#sound-dai-cells'
@ -29,7 +70,22 @@ unevaluatedProperties: false
examples: examples:
- | - |
#include <dt-bindings/sound/qcom,q6afe.h>
dais { dais {
compatible = "qcom,q6apm-lpass-dais"; compatible = "qcom,q6apm-lpass-dais";
#sound-dai-cells = <1>; #sound-dai-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
dai@16 {
reg = <PRIMARY_MI2S_RX>;
clocks = <&q6prmcc LPASS_CLK_ID_MCLK_1
LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6prmcc LPASS_CLK_ID_PRI_MI2S_IBIT
LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6prmcc LPASS_CLK_ID_PRI_MI2S_EBIT
LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
clock-names = "mclk", "bclk", "eclk";
};
}; };

View file

@ -1018,6 +1018,17 @@
status = "okay"; status = "okay";
}; };
&q6apmbedai {
#address-cells = <1>;
#size-cells = <0>;
dai@147 {
reg = <SENARY_MI2S_RX>;
clocks = <&q6prmcc LPASS_CLK_ID_SEN_MI2S_IBIT LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
clock-names = "bclk";
};
};
&qup_uart11_cts { &qup_uart11_cts {
/* /*
* Configure a bias-bus-hold on CTS to lower power * Configure a bias-bus-hold on CTS to lower power

View file

@ -548,6 +548,14 @@
no-map; no-map;
}; };
adsp_rpc_heap_mem: adsp-rpc-heap {
compatible = "shared-dma-pool";
alloc-ranges = <0x0 0x0 0x0 0xffffffff>;
reusable;
alignment = <0x0 0x400000>;
size = <0x0 0xc00000>;
};
pvm_fw_mem: pvm-fw-region@824a0000 { pvm_fw_mem: pvm-fw-region@824a0000 {
reg = <0x0 0x824a0000 0x0 0x100000>; reg = <0x0 0x824a0000 0x0 0x100000>;
no-map; no-map;
@ -1398,6 +1406,9 @@
qcom,glink-channels = "fastrpcglink-apps-dsp"; qcom,glink-channels = "fastrpcglink-apps-dsp";
label = "adsp"; label = "adsp";
qcom,non-secure-domain; qcom,non-secure-domain;
memory-region = <&adsp_rpc_heap_mem>;
qcom,vmids = <QCOM_SCM_VMID_LPASS
QCOM_SCM_VMID_ADSP_HEAP>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;

View file

@ -520,6 +520,54 @@ int qrtr_endpoint_post(struct qrtr_endpoint *ep, const void *data, size_t len)
qrtr_node_assign(node, le32_to_cpu(pkt->server.node)); qrtr_node_assign(node, le32_to_cpu(pkt->server.node));
} }
/* The DSPs are star-connected through this node: forward packets
* destined to another node onto that node's endpoint (e.g. the
* modem's voice stack talking to the ADSP's audio service). Only
* DATA and RESUME_TX transit; control packets keep going to the
* local ns, which does its own mesh-wide redistribution. RESUME_TX
* additionally releases this hop's flow-control token on the
* arrival link: per-hop counters advance in lockstep with the
* end-to-end ones since every packet of the flow transits here.
*/
if (cb->dst_node != qrtr_local_nid &&
cb->dst_node != QRTR_NODE_BCAST &&
(cb->type == QRTR_TYPE_DATA || cb->type == QRTR_TYPE_RESUME_TX)) {
struct sockaddr_qrtr from = {AF_QIPCRTR,
cb->src_node, cb->src_port};
struct sockaddr_qrtr to = {AF_QIPCRTR,
cb->dst_node, cb->dst_port};
struct qrtr_node *dst;
dst = qrtr_node_lookup(cb->dst_node);
if (!dst || dst == node) {
if (dst)
qrtr_node_release(dst);
goto err;
}
if (cb->type == QRTR_TYPE_RESUME_TX) {
struct sk_buff *clone;
clone = skb_clone(skb, GFP_ATOMIC);
if (clone)
qrtr_tx_resume(node, clone);
}
pr_debug("qrtr: fwd %u:%u -> %u:%u type %d len %zu\n",
cb->src_node, cb->src_port,
cb->dst_node, cb->dst_port, cb->type, size);
if (skb_cow_head(skb, sizeof(struct qrtr_hdr_v1))) {
qrtr_node_release(dst);
goto err;
}
qrtr_node_enqueue(dst, skb, cb->type, &from, &to);
qrtr_node_release(dst);
return 0;
}
if (cb->type == QRTR_TYPE_RESUME_TX) { if (cb->type == QRTR_TYPE_RESUME_TX) {
qrtr_tx_resume(node, skb); qrtr_tx_resume(node, skb);
} else { } else {

View file

@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-only # SPDX-License-Identifier: GPL-2.0-only
snd-q6dsp-common-y := q6dsp-common.o q6dsp-lpass-ports.o q6dsp-lpass-clocks.o snd-q6dsp-common-y := q6dsp-common.o q6dsp-lpass-ports.o q6dsp-lpass-clocks.o
snd-q6apm-y := q6apm.o audioreach.o topology.o snd-q6apm-y := q6apm.o audioreach.o topology.o q6apm-voice-proto.o
obj-$(CONFIG_SND_SOC_QDSP6_COMMON) += snd-q6dsp-common.o obj-$(CONFIG_SND_SOC_QDSP6_COMMON) += snd-q6dsp-common.o
obj-$(CONFIG_SND_SOC_QDSP6_CORE) += q6core.o obj-$(CONFIG_SND_SOC_QDSP6_CORE) += q6core.o

View file

@ -2,10 +2,12 @@
// Copyright (c) 2021, Linaro Limited // Copyright (c) 2021, Linaro Limited
#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h> #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
#include <linux/clk.h>
#include <linux/err.h> #include <linux/err.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/device.h> #include <linux/device.h>
#include <linux/of.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/slab.h> #include <linux/slab.h>
#include <sound/pcm.h> #include <sound/pcm.h>
@ -15,13 +17,22 @@
#include "q6dsp-common.h" #include "q6dsp-common.h"
#include "audioreach.h" #include "audioreach.h"
#include "q6apm.h" #include "q6apm.h"
#include "q6prm.h"
#define AUDIOREACH_BE_PCM_BASE 16 #define AUDIOREACH_BE_PCM_BASE 16
struct q6apm_dai_priv_data {
struct clk *mclk;
struct clk *bclk;
struct clk *eclk;
bool mclk_enabled, bclk_enabled, eclk_enabled;
};
struct q6apm_lpass_dai_data { struct q6apm_lpass_dai_data {
struct q6apm_graph *graph[APM_PORT_MAX]; struct q6apm_graph *graph[APM_PORT_MAX];
bool is_port_started[APM_PORT_MAX]; bool is_port_started[APM_PORT_MAX];
struct audioreach_module_config module_config[APM_PORT_MAX]; struct audioreach_module_config module_config[APM_PORT_MAX];
struct q6apm_dai_priv_data priv[APM_PORT_MAX];
}; };
static int q6dma_set_channel_map(struct snd_soc_dai *dai, static int q6dma_set_channel_map(struct snd_soc_dai *dai,
@ -224,21 +235,6 @@ static int q6apm_lpass_dai_prepare(struct snd_pcm_substream *substream, struct s
dev_err(dai->dev, "Failed to prepare Graph %d\n", rc); dev_err(dai->dev, "Failed to prepare Graph %d\n", rc);
goto err; goto err;
} }
/*
* Start the port already at prepare, like q6afe does: this starts
* the interface clocks before the DAPM power-up sequence runs, so
* codecs that need a live BCLK at power-up (e.g. aw88261) can
* start synchronously. The trigger callback keeps its start as a
* no-op fallback via is_port_started.
*/
rc = q6apm_graph_start(dai_data->graph[dai->id]);
if (rc < 0) {
dev_err(dai->dev, "Failed to start APM port %d\n", dai->id);
goto err;
}
dai_data->is_port_started[dai->id] = true;
return 0; return 0;
err: err:
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
@ -266,6 +262,73 @@ static int q6apm_lpass_dai_startup(struct snd_pcm_substream *substream, struct s
return 0; return 0;
} }
static int q6i2s_dai_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
{
return q6apm_lpass_dai_startup(substream, dai);
}
static void q6i2s_lpass_dai_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
{
struct q6apm_lpass_dai_data *dai_data = dev_get_drvdata(dai->dev);
if (dai_data->priv[dai->id].mclk_enabled) {
clk_disable_unprepare(dai_data->priv[dai->id].mclk);
dai_data->priv[dai->id].mclk_enabled = false;
}
if (dai_data->priv[dai->id].bclk_enabled) {
clk_disable_unprepare(dai_data->priv[dai->id].bclk);
dai_data->priv[dai->id].bclk_enabled = false;
}
if (dai_data->priv[dai->id].eclk_enabled) {
clk_disable_unprepare(dai_data->priv[dai->id].eclk);
dai_data->priv[dai->id].eclk_enabled = false;
}
q6apm_lpass_dai_shutdown(substream, dai);
}
static int q6i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id, unsigned int freq, int dir)
{
struct q6apm_lpass_dai_data *dai_data = dev_get_drvdata(dai->dev);
struct clk *sysclk = NULL;
bool *enabled = NULL;
int ret = 0;
switch (clk_id) {
case LPAIF_MI2S_MCLK:
sysclk = dai_data->priv[dai->id].mclk;
enabled = &dai_data->priv[dai->id].mclk_enabled;
break;
case LPAIF_MI2S_BCLK:
sysclk = dai_data->priv[dai->id].bclk;
enabled = &dai_data->priv[dai->id].bclk_enabled;
break;
case LPAIF_MI2S_ECLK:
sysclk = dai_data->priv[dai->id].eclk;
enabled = &dai_data->priv[dai->id].eclk_enabled;
break;
default:
return -EINVAL;
}
if (sysclk) {
if (*enabled)
return 0;
clk_set_rate(sysclk, freq);
ret = clk_prepare_enable(sysclk);
if (ret) {
dev_err(dai->dev, "Error, Unable to prepare (%d) sysclk\n", clk_id);
return ret;
}
*enabled = true;
}
return ret;
}
static int q6i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) static int q6i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
{ {
struct q6apm_lpass_dai_data *dai_data = dev_get_drvdata(dai->dev); struct q6apm_lpass_dai_data *dai_data = dev_get_drvdata(dai->dev);
@ -287,11 +350,12 @@ static const struct snd_soc_dai_ops q6dma_ops = {
static const struct snd_soc_dai_ops q6i2s_ops = { static const struct snd_soc_dai_ops q6i2s_ops = {
.prepare = q6apm_lpass_dai_prepare, .prepare = q6apm_lpass_dai_prepare,
.startup = q6apm_lpass_dai_startup, .startup = q6i2s_dai_startup,
.shutdown = q6apm_lpass_dai_shutdown, .shutdown = q6i2s_lpass_dai_shutdown,
.set_channel_map = q6dma_set_channel_map, .set_channel_map = q6dma_set_channel_map,
.hw_params = q6dma_hw_params, .hw_params = q6dma_hw_params,
.set_fmt = q6i2s_set_fmt, .set_fmt = q6i2s_set_fmt,
.set_sysclk = q6i2s_set_sysclk,
.trigger = q6apm_lpass_dai_trigger, .trigger = q6apm_lpass_dai_trigger,
}; };
@ -312,6 +376,73 @@ static const struct snd_soc_component_driver q6apm_lpass_dai_component = {
.remove_order = SND_SOC_COMP_ORDER_FIRST, .remove_order = SND_SOC_COMP_ORDER_FIRST,
}; };
static int of_q6apm_parse_dai_data(struct device *dev,
struct q6apm_lpass_dai_data *data)
{
int ret;
for_each_child_of_node_scoped(dev->of_node, node) {
struct q6apm_dai_priv_data *priv;
int id;
ret = of_property_read_u32(node, "reg", &id);
if (ret || id < 0 || id >= APM_PORT_MAX) {
dev_err(dev, "valid dai id not found:%d\n", ret);
continue;
}
switch (id) {
/* MI2S specific properties */
case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX:
case QUINARY_MI2S_RX ... QUINARY_MI2S_TX:
case SENARY_MI2S_RX ... SENARY_MI2S_TX:
priv = &data->priv[id];
priv->mclk = of_clk_get_by_name(node, "mclk");
if (IS_ERR(priv->mclk)) {
if (PTR_ERR(priv->mclk) == -EPROBE_DEFER)
return dev_err_probe(dev, PTR_ERR(priv->mclk),
"unable to get mi2s mclk\n");
priv->mclk = NULL;
}
priv->bclk = of_clk_get_by_name(node, "bclk");
if (IS_ERR(priv->bclk)) {
if (PTR_ERR(priv->bclk) == -EPROBE_DEFER) {
if (priv->mclk) {
clk_put(priv->mclk);
priv->mclk = NULL;
}
return dev_err_probe(dev, PTR_ERR(priv->bclk),
"unable to get mi2s bclk\n");
}
priv->bclk = NULL;
}
priv->eclk = of_clk_get_by_name(node, "eclk");
if (IS_ERR(priv->eclk)) {
if (PTR_ERR(priv->eclk) == -EPROBE_DEFER) {
if (priv->mclk) {
clk_put(priv->mclk);
priv->mclk = NULL;
}
if (priv->bclk) {
clk_put(priv->bclk);
priv->bclk = NULL;
}
return dev_err_probe(dev, PTR_ERR(priv->eclk),
"unable to get mi2s eclk\n");
}
priv->eclk = NULL;
}
break;
default:
break;
}
}
return 0;
}
static int q6apm_lpass_dai_dev_probe(struct platform_device *pdev) static int q6apm_lpass_dai_dev_probe(struct platform_device *pdev)
{ {
struct q6dsp_audio_port_dai_driver_config cfg; struct q6dsp_audio_port_dai_driver_config cfg;
@ -319,12 +450,16 @@ static int q6apm_lpass_dai_dev_probe(struct platform_device *pdev)
struct snd_soc_dai_driver *dais; struct snd_soc_dai_driver *dais;
struct device *dev = &pdev->dev; struct device *dev = &pdev->dev;
int num_dais; int num_dais;
int ret;
dai_data = devm_kzalloc(dev, sizeof(*dai_data), GFP_KERNEL); dai_data = devm_kzalloc(dev, sizeof(*dai_data), GFP_KERNEL);
if (!dai_data) if (!dai_data)
return -ENOMEM; return -ENOMEM;
dev_set_drvdata(dev, dai_data); dev_set_drvdata(dev, dai_data);
ret = of_q6apm_parse_dai_data(dev, dai_data);
if (ret)
return ret;
memset(&cfg, 0, sizeof(cfg)); memset(&cfg, 0, sizeof(cfg));
cfg.q6i2s_ops = &q6i2s_ops; cfg.q6i2s_ops = &q6i2s_ops;

View file

@ -0,0 +1,311 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Voice-call bring-up prototype for the Fairphone (Gen. 6): replay
* pre-generated APM command sequences through the q6apm GPR channel.
*
* The blobs reproduce, byte for byte, the GRAPH_OPEN/SET_CFG/PREPARE/START
* sequence the stock Android PAL/AGM/GSL stack sends to set up the
* handset voice-call graphs (mined from the device ACDB; generated by
* utilities/mkvoiceblobs.py in the bring-up repo). The modem's voice
* engine and the ADSP VCPM service wire up the vocoder themselves once
* these graphs are running.
*
* Local prototype only, NOT for upstream. Interface:
* echo <fw-file> > /sys/kernel/debug/q6apm-voice-proto/play
* where <fw-file> is relative to /lib/firmware. Playback aborts on the
* first command the DSP rejects.
*/
#include <linux/debugfs.h>
#include <linux/dma-mapping.h>
#include <linux/firmware.h>
#include <linux/kernel.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/soc/qcom/apr.h>
#include <linux/uaccess.h>
#include <sound/soc.h>
#include "audioreach.h"
#include "q6apm.h"
#define Q6VP_MAGIC 0x50563651 /* "Q6VP" little-endian */
#define Q6VP_VERSION 1
/*
* A record opcode with this bit set is sent out-of-band: the payload is
* placed in an ADSP-mapped shared-memory region and the GPR command carries
* only an apm_cmd_header referencing it. Stock GSL sends every voice
* GRAPH_OPEN this way; it is mandatory because a voice graph must be opened
* atomically as one command (all subgraphs + cross-subgraph module
* connections and control links), and the whole payload (~4.3-4.7 KB)
* exceeds the ~4 KiB in-band GPR/GLINK intent limit. Splitting the open
* per-subgraph to fit in-band makes the cross-referencing TX DevicePP
* subgraph invalid (rejected at open) see journal/calls.md 2026-07-08.
*/
#define Q6VP_OOB_FLAG 0x80000000
#define Q6VP_GRAPH_ID 0xf000 /* private mem-map handle owner */
#define Q6VP_BUF_SZ 0x40000 /* 256 KiB scratch region */
#define Q6VP_SID_MASK 0xf
struct q6vp_hdr {
__le32 magic;
__le32 version;
__le32 num_records;
} __packed;
struct q6vp_rec {
__le32 opcode;
__le32 size;
} __packed;
static struct q6apm *q6vp_apm;
static struct dentry *q6vp_dir;
static struct device *q6vp_dais_dev;
static struct audioreach_graph_info *q6vp_info;
static void *q6vp_buf;
static dma_addr_t q6vp_buf_iova;
static phys_addr_t q6vp_buf_dsp_addr;
static int q6vp_send(uint32_t opcode, const void *payload, uint32_t size)
{
struct gpr_pkt *pkt;
int ret;
pkt = audioreach_alloc_apm_cmd_pkt(size, opcode, 0);
if (IS_ERR(pkt))
return PTR_ERR(pkt);
memcpy((void *)pkt + GPR_HDR_SIZE + APM_CMD_HDR_SIZE, payload, size);
ret = q6apm_send_cmd_sync(q6vp_apm, pkt, 0);
kfree(pkt);
return ret;
}
/*
* Lazily set up the shared-memory region used for OOB commands: allocate a
* DMA buffer against the q6apm-dais child device (it carries the iommus
* mapping the ADSP expects, same as the PCM data path), register a private
* graph_info so the APM_CMD_RSP_SHARED_MEM_MAP_REGIONS callback has a slot
* to store the handle in, and map the region with the DSP. The mapping is
* kept until the module goes away.
*/
static int q6vp_oob_init(void)
{
struct device *dev = q6vp_apm->dev;
struct of_phandle_args args;
struct platform_device *pdev;
struct device_node *np;
u64 sid = 0;
u32 graph_id = Q6VP_GRAPH_ID;
int ret;
if (q6vp_info && q6vp_info->mem_map_handle)
return 0;
if (!q6vp_dais_dev) {
np = of_get_compatible_child(dev->of_node, "qcom,q6apm-dais");
if (!np) {
dev_err(dev, "voice-proto: no q6apm-dais node\n");
return -ENODEV;
}
if (!of_parse_phandle_with_fixed_args(np, "iommus", 1, 0,
&args)) {
sid = args.args[0] & Q6VP_SID_MASK;
of_node_put(args.np);
}
pdev = of_find_device_by_node(np);
of_node_put(np);
if (!pdev) {
dev_err(dev, "voice-proto: no q6apm-dais device\n");
return -ENODEV;
}
q6vp_dais_dev = &pdev->dev;
q6vp_buf = dma_alloc_coherent(q6vp_dais_dev, Q6VP_BUF_SZ,
&q6vp_buf_iova, GFP_KERNEL);
if (!q6vp_buf)
return -ENOMEM;
q6vp_buf_dsp_addr = q6vp_buf_iova | (sid << 32);
}
if (!q6vp_info) {
q6vp_info = kzalloc(sizeof(*q6vp_info), GFP_KERNEL);
if (!q6vp_info)
return -ENOMEM;
INIT_LIST_HEAD(&q6vp_info->sg_list);
q6vp_info->id = Q6VP_GRAPH_ID;
ret = idr_alloc_u32(&q6vp_apm->graph_info_idr, q6vp_info,
&graph_id, graph_id, GFP_KERNEL);
if (ret < 0) {
kfree(q6vp_info);
q6vp_info = NULL;
return ret;
}
}
ret = q6apm_map_memory_fixed_region(q6vp_dais_dev, Q6VP_GRAPH_ID,
q6vp_buf_dsp_addr, Q6VP_BUF_SZ);
if (ret) {
dev_err(dev, "voice-proto: mem map failed (%d)\n", ret);
return ret;
}
dev_info(dev, "voice-proto: OOB region mapped, handle 0x%x\n",
q6vp_info->mem_map_handle);
return 0;
}
static int q6vp_send_oob(uint32_t opcode, const void *payload, uint32_t size)
{
struct apm_cmd_header *cmd_header;
struct gpr_pkt *pkt;
int ret;
if (size > Q6VP_BUF_SZ)
return -EFBIG;
ret = q6vp_oob_init();
if (ret)
return ret;
memcpy(q6vp_buf, payload, size);
pkt = audioreach_alloc_apm_cmd_pkt(0, opcode, 0);
if (IS_ERR(pkt))
return PTR_ERR(pkt);
/*
* The region is mapped in absolute-address mode (mainline's
* q6apm_map_memory_fixed_region passes property_flag 0, unlike GSL
* which maps with IS_OFFSET_MODE and then references offset 0), so
* the header carries the full DSP-visible address of the buffer.
*/
cmd_header = (void *)pkt + GPR_HDR_SIZE;
cmd_header->payload_address_lsw = lower_32_bits(q6vp_buf_dsp_addr);
cmd_header->payload_address_msw = upper_32_bits(q6vp_buf_dsp_addr);
cmd_header->mem_map_handle = q6vp_info->mem_map_handle;
cmd_header->payload_size = size;
ret = q6apm_send_cmd_sync(q6vp_apm, pkt, 0);
kfree(pkt);
return ret;
}
static int q6vp_play(const char *name)
{
const struct firmware *fw;
const struct q6vp_hdr *hdr;
const struct q6vp_rec *rec;
struct device *dev = q6vp_apm->dev;
size_t off;
uint32_t i, num, opcode, size;
int ret, err = 0;
ret = request_firmware(&fw, name, dev);
if (ret) {
dev_err(dev, "voice-proto: cannot load %s (%d)\n", name, ret);
return ret;
}
hdr = (const struct q6vp_hdr *)fw->data;
if (fw->size < sizeof(*hdr) ||
le32_to_cpu(hdr->magic) != Q6VP_MAGIC ||
le32_to_cpu(hdr->version) != Q6VP_VERSION) {
dev_err(dev, "voice-proto: %s: bad header\n", name);
ret = -EINVAL;
goto out;
}
num = le32_to_cpu(hdr->num_records);
off = sizeof(*hdr);
for (i = 0; i < num; i++) {
if (off + sizeof(*rec) > fw->size) {
ret = -EINVAL;
goto out;
}
rec = (const struct q6vp_rec *)(fw->data + off);
opcode = le32_to_cpu(rec->opcode);
size = le32_to_cpu(rec->size);
off += sizeof(*rec);
if (off + size > fw->size) {
ret = -EINVAL;
goto out;
}
if (opcode & Q6VP_OOB_FLAG)
ret = q6vp_send_oob(opcode & ~Q6VP_OOB_FLAG,
fw->data + off, size);
else
ret = q6vp_send(opcode, fw->data + off, size);
dev_info(dev, "voice-proto: %s[%u] opcode 0x%08x size %u -> %d\n",
name, i, opcode & ~Q6VP_OOB_FLAG, size, ret);
/* keep going on DSP rejections; each result is logged */
if (ret)
err = ret;
off += ALIGN(size, 4);
}
out:
release_firmware(fw);
return ret ? ret : err;
}
static ssize_t q6vp_play_write(struct file *file, const char __user *ubuf,
size_t count, loff_t *ppos)
{
char name[128];
int ret;
if (!q6vp_apm)
return -ENODEV;
if (count >= sizeof(name))
return -EINVAL;
if (copy_from_user(name, ubuf, count))
return -EFAULT;
name[count] = '\0';
strim(name);
ret = q6vp_play(name);
return ret ? ret : count;
}
static const struct file_operations q6vp_play_fops = {
.open = simple_open,
.write = q6vp_play_write,
.llseek = default_llseek,
};
void q6apm_voice_proto_init(struct q6apm *apm)
{
q6vp_apm = apm;
q6vp_dir = debugfs_create_dir("q6apm-voice-proto", NULL);
debugfs_create_file("play", 0200, q6vp_dir, NULL, &q6vp_play_fops);
}
void q6apm_voice_proto_exit(void)
{
debugfs_remove_recursive(q6vp_dir);
q6vp_dir = NULL;
if (q6vp_info) {
if (q6vp_info->mem_map_handle)
q6apm_unmap_memory_fixed_region(q6vp_dais_dev,
Q6VP_GRAPH_ID);
idr_remove(&q6vp_apm->graph_info_idr, Q6VP_GRAPH_ID);
kfree(q6vp_info);
q6vp_info = NULL;
}
if (q6vp_buf) {
dma_free_coherent(q6vp_dais_dev, Q6VP_BUF_SZ, q6vp_buf,
q6vp_buf_iova);
q6vp_buf = NULL;
}
q6vp_dais_dev = NULL;
q6vp_apm = NULL;
}

View file

@ -764,6 +764,8 @@ static int apm_probe(gpr_device_t *gdev)
g_apm = apm; g_apm = apm;
q6apm_voice_proto_init(apm);
q6apm_get_apm_state(apm); q6apm_get_apm_state(apm);
ret = snd_soc_register_component(dev, &q6apm_audio_component, NULL, 0); ret = snd_soc_register_component(dev, &q6apm_audio_component, NULL, 0);
@ -781,6 +783,7 @@ static int apm_probe(gpr_device_t *gdev)
static void apm_remove(gpr_device_t *gdev) static void apm_remove(gpr_device_t *gdev)
{ {
q6apm_voice_proto_exit();
of_platform_depopulate(&gdev->dev); of_platform_depopulate(&gdev->dev);
snd_soc_unregister_component(&gdev->dev); snd_soc_unregister_component(&gdev->dev);
} }

View file

@ -157,4 +157,8 @@ int q6apm_remove_initial_silence(struct device *dev, struct q6apm_graph *graph,
int q6apm_remove_trailing_silence(struct device *dev, struct q6apm_graph *graph, uint32_t samples); int q6apm_remove_trailing_silence(struct device *dev, struct q6apm_graph *graph, uint32_t samples);
int q6apm_set_real_module_id(struct device *dev, struct q6apm_graph *graph, uint32_t codec_id); int q6apm_set_real_module_id(struct device *dev, struct q6apm_graph *graph, uint32_t codec_id);
int q6apm_get_hw_pointer(struct q6apm_graph *graph, int dir); int q6apm_get_hw_pointer(struct q6apm_graph *graph, int dir);
/* FP6 voice-call bring-up prototype (q6apm-voice-proto.c) */
void q6apm_voice_proto_init(struct q6apm *apm);
void q6apm_voice_proto_exit(void);
#endif /* __APM_GRAPH_ */ #endif /* __APM_GRAPH_ */

View file

@ -3,6 +3,10 @@
#ifndef __Q6PRM_H__ #ifndef __Q6PRM_H__
#define __Q6PRM_H__ #define __Q6PRM_H__
#define LPAIF_MI2S_MCLK 1
#define LPAIF_MI2S_BCLK 2
#define LPAIF_MI2S_ECLK 3
/* Clock ID for Primary I2S IBIT */ /* Clock ID for Primary I2S IBIT */
#define Q6PRM_LPASS_CLK_ID_PRI_MI2S_IBIT 0x100 #define Q6PRM_LPASS_CLK_ID_PRI_MI2S_IBIT 0x100
/* Clock ID for Primary I2S EBIT */ /* Clock ID for Primary I2S EBIT */

View file

@ -12,17 +12,78 @@
#include <sound/jack.h> #include <sound/jack.h>
#include <linux/input-event-codes.h> #include <linux/input-event-codes.h>
#include "qdsp6/q6afe.h" #include "qdsp6/q6afe.h"
#include "qdsp6/q6apm.h"
#include "qdsp6/q6prm.h"
#include "common.h" #include "common.h"
#include "sdw.h" #include "sdw.h"
#define I2S_MCLKFS 256
#define I2S_MCLK_RATE(rate) \
((rate) * (I2S_MCLKFS))
#define I2S_BIT_RATE(rate, channels, format) \
((rate) * (channels) * (format))
static struct snd_soc_dapm_widget sc8280xp_dapm_widgets[] = {
SND_SOC_DAPM_HP("Headphone Jack", NULL),
SND_SOC_DAPM_MIC("Mic Jack", NULL),
SND_SOC_DAPM_SPK("DP0 Jack", NULL),
SND_SOC_DAPM_SPK("DP1 Jack", NULL),
SND_SOC_DAPM_SPK("DP2 Jack", NULL),
SND_SOC_DAPM_SPK("DP3 Jack", NULL),
SND_SOC_DAPM_SPK("DP4 Jack", NULL),
SND_SOC_DAPM_SPK("DP5 Jack", NULL),
SND_SOC_DAPM_SPK("DP6 Jack", NULL),
SND_SOC_DAPM_SPK("DP7 Jack", NULL),
};
struct snd_soc_common {
const char *driver_name;
const struct snd_soc_dapm_widget *dapm_widgets;
int num_dapm_widgets;
const struct snd_soc_dapm_route *dapm_routes;
int num_dapm_routes;
const struct snd_kcontrol_new *controls;
int num_controls;
unsigned int codec_dai_fmt;
bool codec_sysclk_set;
bool mi2s_mclk_enable;
bool mi2s_bclk_enable;
bool wcd_jack;
};
struct sc8280xp_snd_data { struct sc8280xp_snd_data {
bool stream_prepared[AFE_PORT_MAX]; bool stream_prepared[AFE_PORT_MAX];
struct snd_soc_card *card; struct snd_soc_card *card;
struct snd_soc_jack jack; struct snd_soc_jack jack;
struct snd_soc_jack dp_jack[8]; struct snd_soc_jack dp_jack[8];
struct snd_soc_common *snd_soc_common_priv;
bool jack_setup; bool jack_setup;
}; };
static inline int sc8280xp_get_mclk_freq(struct snd_pcm_hw_params *params)
{
int rate = params_rate(params);
switch (rate) {
case 11025:
case 44100:
case 88200:
return I2S_MCLK_RATE(44100);
default:
break;
}
return I2S_MCLK_RATE(rate);
}
static inline int sc8280xp_get_bclk_freq(struct snd_pcm_hw_params *params)
{
return I2S_BIT_RATE(params_rate(params),
params_channels(params),
snd_pcm_format_width(params_format(params)));
}
static int sc8280xp_snd_init(struct snd_soc_pcm_runtime *rtd) static int sc8280xp_snd_init(struct snd_soc_pcm_runtime *rtd)
{ {
struct sc8280xp_snd_data *data = snd_soc_card_get_drvdata(rtd->card); struct sc8280xp_snd_data *data = snd_soc_card_get_drvdata(rtd->card);
@ -32,11 +93,6 @@ static int sc8280xp_snd_init(struct snd_soc_pcm_runtime *rtd)
int dp_pcm_id = 0; int dp_pcm_id = 0;
switch (cpu_dai->id) { switch (cpu_dai->id) {
case PRIMARY_MI2S_RX...QUATERNARY_MI2S_TX:
case QUINARY_MI2S_RX...QUINARY_MI2S_TX:
case SENARY_MI2S_RX...SENARY_MI2S_TX:
snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_BP_FP);
break;
case WSA_CODEC_DMA_RX_0: case WSA_CODEC_DMA_RX_0:
case WSA_CODEC_DMA_RX_1: case WSA_CODEC_DMA_RX_1:
/* /*
@ -65,7 +121,10 @@ static int sc8280xp_snd_init(struct snd_soc_pcm_runtime *rtd)
if (dp_jack) if (dp_jack)
return qcom_snd_dp_jack_setup(rtd, dp_jack, dp_pcm_id); return qcom_snd_dp_jack_setup(rtd, dp_jack, dp_pcm_id);
return qcom_snd_wcd_jack_setup(rtd, &data->jack, &data->jack_setup); if (data->snd_soc_common_priv->wcd_jack)
return qcom_snd_wcd_jack_setup(rtd, &data->jack, &data->jack_setup);
return 0;
} }
static int sc8280xp_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, static int sc8280xp_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
@ -97,6 +156,63 @@ static int sc8280xp_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
return 0; return 0;
} }
static int sc8280xp_snd_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0);
struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0);
struct sc8280xp_snd_data *data = snd_soc_card_get_drvdata(rtd->card);
int mclk_freq = sc8280xp_get_mclk_freq(params);
int bclk_freq = sc8280xp_get_bclk_freq(params);
int ret;
switch (cpu_dai->id) {
case PRIMARY_MI2S_RX ... QUATERNARY_MI2S_TX:
case QUINARY_MI2S_RX ... QUINARY_MI2S_TX:
case SENARY_MI2S_RX ... SENARY_MI2S_TX:
ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_BP_FP);
if (ret && ret != -ENOTSUPP)
return ret;
if (data->snd_soc_common_priv->codec_dai_fmt) {
ret = snd_soc_dai_set_fmt(codec_dai,
data->snd_soc_common_priv->codec_dai_fmt);
if (ret && ret != -ENOTSUPP)
return ret;
}
if (data->snd_soc_common_priv->mi2s_mclk_enable) {
ret = snd_soc_dai_set_sysclk(cpu_dai,
LPAIF_MI2S_MCLK, mclk_freq,
SND_SOC_CLOCK_OUT);
if (ret)
return ret;
}
if (data->snd_soc_common_priv->mi2s_bclk_enable) {
ret = snd_soc_dai_set_sysclk(cpu_dai,
LPAIF_MI2S_BCLK, bclk_freq,
SND_SOC_CLOCK_OUT);
if (ret)
return ret;
}
if (data->snd_soc_common_priv->codec_sysclk_set) {
ret = snd_soc_dai_set_sysclk(codec_dai,
0, mclk_freq,
SND_SOC_CLOCK_IN);
if (ret)
return ret;
}
break;
default:
break;
}
return 0;
}
static int sc8280xp_snd_prepare(struct snd_pcm_substream *substream) static int sc8280xp_snd_prepare(struct snd_pcm_substream *substream)
{ {
struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
@ -118,6 +234,7 @@ static int sc8280xp_snd_hw_free(struct snd_pcm_substream *substream)
static const struct snd_soc_ops sc8280xp_be_ops = { static const struct snd_soc_ops sc8280xp_be_ops = {
.startup = qcom_snd_sdw_startup, .startup = qcom_snd_sdw_startup,
.shutdown = qcom_snd_sdw_shutdown, .shutdown = qcom_snd_sdw_shutdown,
.hw_params = sc8280xp_snd_hw_params,
.hw_free = sc8280xp_snd_hw_free, .hw_free = sc8280xp_snd_hw_free,
.prepare = sc8280xp_snd_prepare, .prepare = sc8280xp_snd_prepare,
}; };
@ -128,7 +245,7 @@ static void sc8280xp_add_be_ops(struct snd_soc_card *card)
int i; int i;
for_each_card_prelinks(card, i, link) { for_each_card_prelinks(card, i, link) {
if (link->no_pcm == 1) { if (link->no_pcm == 1 || link->num_codecs > 0) {
link->init = sc8280xp_snd_init; link->init = sc8280xp_snd_init;
link->be_hw_params_fixup = sc8280xp_be_hw_params_fixup; link->be_hw_params_fixup = sc8280xp_be_hw_params_fixup;
link->ops = &sc8280xp_be_ops; link->ops = &sc8280xp_be_ops;
@ -146,38 +263,133 @@ static int sc8280xp_platform_probe(struct platform_device *pdev)
card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL); card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
if (!card) if (!card)
return -ENOMEM; return -ENOMEM;
card->owner = THIS_MODULE;
/* Allocate the private data */ /* Allocate the private data */
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data) if (!data)
return -ENOMEM; return -ENOMEM;
data->snd_soc_common_priv = (struct snd_soc_common *)of_device_get_match_data(dev);
if (!data->snd_soc_common_priv)
return -ENODEV;
card->owner = THIS_MODULE;
card->dev = dev; card->dev = dev;
dev_set_drvdata(dev, card); dev_set_drvdata(dev, card);
snd_soc_card_set_drvdata(card, data); snd_soc_card_set_drvdata(card, data);
card->dapm_widgets = data->snd_soc_common_priv->dapm_widgets;
card->num_dapm_widgets = data->snd_soc_common_priv->num_dapm_widgets;
card->dapm_routes = data->snd_soc_common_priv->dapm_routes;
card->num_dapm_routes = data->snd_soc_common_priv->num_dapm_routes;
card->controls = data->snd_soc_common_priv->controls;
card->num_controls = data->snd_soc_common_priv->num_controls;
ret = qcom_snd_parse_of(card); ret = qcom_snd_parse_of(card);
if (ret) if (ret)
return ret; return ret;
card->driver_name = of_device_get_match_data(dev); card->driver_name = data->snd_soc_common_priv->driver_name;
sc8280xp_add_be_ops(card); sc8280xp_add_be_ops(card);
return devm_snd_soc_register_card(dev, card); return devm_snd_soc_register_card(dev, card);
} }
static struct snd_soc_common kaanapali_priv_data = {
.driver_name = "kaanapali",
.dapm_widgets = sc8280xp_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(sc8280xp_dapm_widgets),
.wcd_jack = true,
};
static struct snd_soc_common milos_priv_data = {
.driver_name = "milos",
.dapm_widgets = sc8280xp_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(sc8280xp_dapm_widgets),
.mi2s_bclk_enable = true,
.wcd_jack = true,
};
static struct snd_soc_common qcs9100_priv_data = {
.driver_name = "sa8775p",
.dapm_widgets = sc8280xp_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(sc8280xp_dapm_widgets),
};
static struct snd_soc_common qcs615_priv_data = {
.driver_name = "qcs615",
.dapm_widgets = sc8280xp_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(sc8280xp_dapm_widgets),
.mi2s_mclk_enable = true,
};
static struct snd_soc_common qcm6490_priv_data = {
.driver_name = "qcm6490",
.dapm_widgets = sc8280xp_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(sc8280xp_dapm_widgets),
.wcd_jack = true,
};
static struct snd_soc_common qcs6490_priv_data = {
.driver_name = "qcs6490",
.dapm_widgets = sc8280xp_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(sc8280xp_dapm_widgets),
.wcd_jack = true,
};
static struct snd_soc_common qcs8275_priv_data = {
.driver_name = "qcs8300",
.dapm_widgets = sc8280xp_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(sc8280xp_dapm_widgets),
};
static struct snd_soc_common sc8280xp_priv_data = {
.driver_name = "sc8280xp",
.dapm_widgets = sc8280xp_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(sc8280xp_dapm_widgets),
.wcd_jack = true,
};
static struct snd_soc_common sm8450_priv_data = {
.driver_name = "sm8450",
.dapm_widgets = sc8280xp_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(sc8280xp_dapm_widgets),
.wcd_jack = true,
};
static struct snd_soc_common sm8550_priv_data = {
.driver_name = "sm8550",
.dapm_widgets = sc8280xp_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(sc8280xp_dapm_widgets),
.wcd_jack = true,
};
static struct snd_soc_common sm8650_priv_data = {
.driver_name = "sm8650",
.dapm_widgets = sc8280xp_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(sc8280xp_dapm_widgets),
.wcd_jack = true,
};
static struct snd_soc_common sm8750_priv_data = {
.driver_name = "sm8750",
.dapm_widgets = sc8280xp_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(sc8280xp_dapm_widgets),
.wcd_jack = true,
};
static const struct of_device_id snd_sc8280xp_dt_match[] = { static const struct of_device_id snd_sc8280xp_dt_match[] = {
{.compatible = "qcom,kaanapali-sndcard", "kaanapali"}, {.compatible = "qcom,kaanapali-sndcard", .data = &kaanapali_priv_data},
{.compatible = "qcom,milos-sndcard", "milos"}, {.compatible = "qcom,milos-sndcard", .data = &milos_priv_data},
{.compatible = "qcom,qcm6490-idp-sndcard", "qcm6490"}, {.compatible = "qcom,qcm6490-idp-sndcard", .data = &qcm6490_priv_data},
{.compatible = "qcom,qcs615-sndcard", "qcs615"}, {.compatible = "qcom,qcs615-sndcard", .data = &qcs615_priv_data},
{.compatible = "qcom,qcs6490-rb3gen2-sndcard", "qcs6490"}, {.compatible = "qcom,qcs6490-rb3gen2-sndcard", .data = &qcs6490_priv_data},
{.compatible = "qcom,qcs8275-sndcard", "qcs8300"}, {.compatible = "qcom,qcs8275-sndcard", .data = &qcs8275_priv_data},
{.compatible = "qcom,qcs9075-sndcard", "sa8775p"}, {.compatible = "qcom,qcs9075-sndcard", .data = &qcs9100_priv_data},
{.compatible = "qcom,qcs9100-sndcard", "sa8775p"}, {.compatible = "qcom,qcs9100-sndcard", .data = &qcs9100_priv_data},
{.compatible = "qcom,sc8280xp-sndcard", "sc8280xp"}, {.compatible = "qcom,sc8280xp-sndcard", .data = &sc8280xp_priv_data},
{.compatible = "qcom,sm8450-sndcard", "sm8450"}, {.compatible = "qcom,sm8450-sndcard", .data = &sm8450_priv_data},
{.compatible = "qcom,sm8550-sndcard", "sm8550"}, {.compatible = "qcom,sm8550-sndcard", .data = &sm8550_priv_data},
{.compatible = "qcom,sm8650-sndcard", "sm8650"}, {.compatible = "qcom,sm8650-sndcard", .data = &sm8650_priv_data},
{.compatible = "qcom,sm8750-sndcard", "sm8750"}, {.compatible = "qcom,sm8750-sndcard", .data = &sm8750_priv_data},
{} {}
}; };